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[oota-llvm.git] / lib / CodeGen / MachineLICM.cpp

diff --git a/lib/CodeGen/MachineLICM.cpp b/lib/CodeGen/MachineLICM.cpp
index f26635d5001fb07b44a4858bffaf4119cf48d5c8..428a9d9bde5260a7c8a519f827c370d24d243294 100644 (file)
--- a/lib/CodeGen/MachineLICM.cpp
+++ b/lib/CodeGen/MachineLICM.cpp
@@ -311,12 +311,6 @@ static bool LoopIsOuterMostWithPredecessor(MachineLoop *CurLoop) {
 }
 
 bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
-  if (PreRegAlloc)
-    DEBUG(dbgs() << "******** Pre-regalloc Machine LICM: ");
-  else
-    DEBUG(dbgs() << "******** Post-regalloc Machine LICM: ");
-  DEBUG(dbgs() << MF.getFunction()->getName() << " ********\n");
-
   Changed = FirstInLoop = false;
   TM = &MF.getTarget();
   TII = TM->getInstrInfo();
@@ -328,6 +322,12 @@ bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
 
   PreRegAlloc = MRI->isSSA();
 
+  if (PreRegAlloc)
+    DEBUG(dbgs() << "******** Pre-regalloc Machine LICM: ");
+  else
+    DEBUG(dbgs() << "******** Post-regalloc Machine LICM: ");
+  DEBUG(dbgs() << MF.getFunction()->getName() << " ********\n");
+
   if (PreRegAlloc) {
     // Estimate register pressure during pre-regalloc pass.
     unsigned NumRC = TRI->getNumRegClasses();
@@ -434,7 +434,7 @@ void MachineLICM::ProcessMI(MachineInstr *MI,
     }
 
     if (MO.isImplicit()) {
-      for (const unsigned *AS = TRI->getOverlaps(Reg); *AS; ++AS)
+      for (const uint16_t *AS = TRI->getOverlaps(Reg); *AS; ++AS)
         PhysRegClobbers.set(*AS);
       if (!MO.isDead())
         // Non-dead implicit def? This cannot be hoisted.
@@ -454,7 +454,7 @@ void MachineLICM::ProcessMI(MachineInstr *MI,
     // If we have already seen another instruction that defines the same
     // register, then this is not safe.  Two defs is indicated by setting a
     // PhysRegClobbers bit.
-    for (const unsigned *AS = TRI->getOverlaps(Reg); *AS; ++AS) {
+    for (const uint16_t *AS = TRI->getOverlaps(Reg); *AS; ++AS) {
       if (PhysRegDefs.test(*AS))
         PhysRegClobbers.set(*AS);
       if (PhysRegClobbers.test(*AS))
@@ -502,7 +502,7 @@ void MachineLICM::HoistRegionPostRA() {
     for (MachineBasicBlock::livein_iterator I = BB->livein_begin(),
            E = BB->livein_end(); I != E; ++I) {
       unsigned Reg = *I;
-      for (const unsigned *AS = TRI->getOverlaps(Reg); *AS; ++AS)
+      for (const uint16_t *AS = TRI->getOverlaps(Reg); *AS; ++AS)
         PhysRegDefs.set(*AS);
     }
 
@@ -1151,8 +1151,8 @@ bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) {
         (!IsGuaranteedToExecute(MI.getParent()) && !MayCSE(&MI)))
       return false;
 
-    // High register pressure situation, only hoist if the instruction is going to
-    // be remat'ed.
+    // High register pressure situation, only hoist if the instruction is going
+    // to be remat'ed.
     if (!TII->isTriviallyReMaterializable(&MI, AA) &&
         !MI.isInvariantLoad(AA))
       return false;