Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements

[oota-llvm.git] / lib / CodeGen / MachineRegisterInfo.cpp

diff --git a/lib/CodeGen/MachineRegisterInfo.cpp b/lib/CodeGen/MachineRegisterInfo.cpp
index 724d81cdba869c3378bbd37dcb540f4cdd04e16b..402be479eac305be81caeca43a6f921d4d7ec5c2 100644 (file)
--- a/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/lib/CodeGen/MachineRegisterInfo.cpp
@@ -133,6 +133,15 @@ bool MachineRegisterInfo::hasOneNonDBGUse(unsigned RegNo) const {
   return ++UI == use_nodbg_end();
 }
 
+/// clearKillFlags - Iterate over all the uses of the given register and
+/// clear the kill flag from the MachineOperand. This function is used by
+/// optimization passes which extend register lifetimes and need only
+/// preserve conservative kill flag information.
+void MachineRegisterInfo::clearKillFlags(unsigned Reg) const {
+  for (use_iterator UI = use_begin(Reg), UE = use_end(); UI != UE; ++UI)
+    UI.getOperand().setIsKill(false);
+}
+
 bool MachineRegisterInfo::isLiveIn(unsigned Reg) const {
   for (livein_iterator I = livein_begin(), E = livein_end(); I != E; ++I)
     if (I->first == Reg || I->second == Reg)
@@ -147,6 +156,15 @@ bool MachineRegisterInfo::isLiveOut(unsigned Reg) const {
   return false;
 }
 
+/// getLiveInPhysReg - If VReg is a live-in virtual register, return the
+/// corresponding live-in physical register.
+unsigned MachineRegisterInfo::getLiveInPhysReg(unsigned VReg) const {
+  for (livein_iterator I = livein_begin(), E = livein_end(); I != E; ++I)
+    if (I->second == VReg)
+      return I->first;
+  return 0;
+}
+
 static cl::opt<bool>
 SchedLiveInCopies("schedule-livein-copies", cl::Hidden,
                   cl::desc("Schedule copies of livein registers"),
@@ -209,7 +227,8 @@ static void EmitLiveInCopy(MachineBasicBlock *MBB,
     --Pos;
   }
 
-  bool Emitted = TII.copyRegToReg(*MBB, Pos, VirtReg, PhysReg, RC, RC);
+  bool Emitted = TII.copyRegToReg(*MBB, Pos, VirtReg, PhysReg, RC, RC,
+                                  DebugLoc());
   assert(Emitted && "Unable to issue a live-in copy instruction!\n");
   (void) Emitted;
 
@@ -220,30 +239,6 @@ static void EmitLiveInCopy(MachineBasicBlock *MBB,
   }
 }
 
-/// InsertLiveInDbgValue - Insert a DBG_VALUE instruction for each live-in
-/// register that has a corresponding source information metadata. e.g.
-/// function parameters.
-static void InsertLiveInDbgValue(MachineBasicBlock *MBB,
-                                 MachineBasicBlock::iterator InsertPos,
-                                 unsigned LiveInReg, unsigned VirtReg,
-                                 const MachineRegisterInfo &MRI,
-                                 const TargetInstrInfo &TII) {
-  for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(VirtReg),
-         UE = MRI.use_end(); UI != UE; ++UI) {
-    MachineInstr *UseMI = &*UI;
-    if (!UseMI->isDebugValue() || UseMI->getParent() != MBB)
-      continue;
-    // Found local dbg_value. FIXME: Verify it's not possible to have multiple
-    // dbg_value's which reference the vr in the same mbb.
-    uint64_t Offset = UseMI->getOperand(1).getImm();
-    const MDNode *MDPtr = UseMI->getOperand(2).getMetadata();    
-    BuildMI(*MBB, InsertPos, InsertPos->getDebugLoc(),
-            TII.get(TargetOpcode::DBG_VALUE))
-      .addReg(LiveInReg).addImm(Offset).addMetadata(MDPtr);
-    return;
-  }
-}
-
 /// EmitLiveInCopies - Emit copies to initialize livein virtual registers
 /// into the given entry block.
 void
@@ -260,8 +255,6 @@ MachineRegisterInfo::EmitLiveInCopies(MachineBasicBlock *EntryMBB,
         const TargetRegisterClass *RC = getRegClass(LI->second);
         EmitLiveInCopy(EntryMBB, InsertPos, LI->second, LI->first,
                        RC, CopyRegMap, *this, TRI, TII);
-        InsertLiveInDbgValue(EntryMBB, InsertPos,
-                             LI->first, LI->second, *this, TII);
       }
   } else {
     // Emit the copies into the top of the block.
@@ -270,11 +263,10 @@ MachineRegisterInfo::EmitLiveInCopies(MachineBasicBlock *EntryMBB,
       if (LI->second) {
         const TargetRegisterClass *RC = getRegClass(LI->second);
         bool Emitted = TII.copyRegToReg(*EntryMBB, EntryMBB->begin(),
-                                        LI->second, LI->first, RC, RC);
+                                        LI->second, LI->first, RC, RC,
+                                        DebugLoc());
         assert(Emitted && "Unable to issue a live-in copy instruction!\n");
         (void) Emitted;
-        InsertLiveInDbgValue(EntryMBB, EntryMBB->begin(),
-                             LI->first, LI->second, *this, TII);
       }
   }
 
@@ -284,6 +276,15 @@ MachineRegisterInfo::EmitLiveInCopies(MachineBasicBlock *EntryMBB,
     EntryMBB->addLiveIn(I->first);
 }
 
+void MachineRegisterInfo::closePhysRegsUsed(const TargetRegisterInfo &TRI) {
+  for (int i = UsedPhysRegs.find_first(); i >= 0;
+       i = UsedPhysRegs.find_next(i))
+         for (const unsigned *SS = TRI.getSubRegisters(i);
+              unsigned SubReg = *SS; ++SS)
+           if (SubReg > unsigned(i))
+             UsedPhysRegs.set(SubReg);
+}
+
 #ifndef NDEBUG
 void MachineRegisterInfo::dumpUses(unsigned Reg) const {
   for (use_iterator I = use_begin(Reg), E = use_end(); I != E; ++I)