Trim unnecessary #includes.

[oota-llvm.git] / lib / CodeGen / MachineRegisterInfo.cpp

diff --git a/lib/CodeGen/MachineRegisterInfo.cpp b/lib/CodeGen/MachineRegisterInfo.cpp
index dbb01c3e553b102c7824ea765c38cbcc608d867c..c247a22d23e70a00059b0d274820a0c08570de73 100644 (file)
--- a/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/lib/CodeGen/MachineRegisterInfo.cpp
@@ -14,19 +14,22 @@
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 using namespace llvm;
 
-MachineRegisterInfo::MachineRegisterInfo(const MRegisterInfo &MRI) {
+MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI) {
   VRegInfo.reserve(256);
-  UsedPhysRegs.resize(MRI.getNumRegs());
+  UsedPhysRegs.resize(TRI.getNumRegs());
   
   // Create the physreg use/def lists.
-  PhysRegUseDefLists = new MachineOperand*[MRI.getNumRegs()];
-  memset(PhysRegUseDefLists, 0, sizeof(MachineOperand*)*MRI.getNumRegs());
+  PhysRegUseDefLists = new MachineOperand*[TRI.getNumRegs()];
+  memset(PhysRegUseDefLists, 0, sizeof(MachineOperand*)*TRI.getNumRegs());
 }
 
 MachineRegisterInfo::~MachineRegisterInfo() {
 #ifndef NDEBUG
   for (unsigned i = 0, e = VRegInfo.size(); i != e; ++i)
     assert(VRegInfo[i].second == 0 && "Vreg use list non-empty still?");
+  for (unsigned i = 0, e = UsedPhysRegs.size(); i != e; ++i)
+    assert(!PhysRegUseDefLists[i] &&
+           "PhysRegUseDefLists has entries after all instructions are deleted");
 #endif
   delete [] PhysRegUseDefLists;
 }
@@ -64,7 +67,7 @@ void MachineRegisterInfo::replaceRegWith(unsigned FromReg, unsigned ToReg) {
 /// register or null if none is found.  This assumes that the code is in SSA
 /// form, so there should only be one definition.
 MachineInstr *MachineRegisterInfo::getVRegDef(unsigned Reg) const {
-  assert(Reg-MRegisterInfo::FirstVirtualRegister < VRegInfo.size() &&
+  assert(Reg-TargetRegisterInfo::FirstVirtualRegister < VRegInfo.size() &&
          "Invalid vreg!");
   for (reg_iterator I = reg_begin(Reg), E = reg_end(); I != E; ++I) {
     // Since we are in SSA form, we can stop at the first definition.
@@ -73,3 +76,11 @@ MachineInstr *MachineRegisterInfo::getVRegDef(unsigned Reg) const {
   }
   return 0;
 }
+
+
+#ifndef NDEBUG
+void MachineRegisterInfo::dumpUses(unsigned Reg) const {
+  for (use_iterator I = use_begin(Reg), E = use_end(); I != E; ++I)
+    I.getOperand().getParent()->dump();
+}
+#endif