these two pieces of code are the same because we always

[oota-llvm.git] / lib / CodeGen / MachineSink.cpp

diff --git a/lib/CodeGen/MachineSink.cpp b/lib/CodeGen/MachineSink.cpp
index c832f0a65c817b7782fce2349d69dd6ea118fd6d..0e18fa742f5b327cc61dfe170b0d5cbf9ac74552 100644 (file)
--- a/lib/CodeGen/MachineSink.cpp
+++ b/lib/CodeGen/MachineSink.cpp
@@ -15,10 +15,9 @@
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/MachineDominators.h"
-#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/Debug.h"
@@ -36,7 +35,7 @@ namespace {
 
   public:
     static char ID; // Pass identification
-    MachineSinking() : MachineFunctionPass((intptr_t)&ID) {}
+    MachineSinking() : MachineFunctionPass(&ID) {}
     
     virtual bool runOnMachineFunction(MachineFunction &MF);
     
@@ -47,13 +46,14 @@ namespace {
     }
   private:
     bool ProcessBlock(MachineBasicBlock &MBB);
-    bool SinkInstruction(MachineInstr *MI);
+    bool SinkInstruction(MachineInstr *MI, bool &SawStore);
     bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB) const;
   };
-  
-  char MachineSinking::ID = 0;
-  RegisterPass<MachineSinking> X("machine-sink", "Machine code sinking");
 } // end anonymous namespace
+  
+char MachineSinking::ID = 0;
+static RegisterPass<MachineSinking>
+X("machine-sink", "Machine code sinking");
 
 FunctionPass *llvm::createMachineSinkingPass() { return new MachineSinking(); }
 
@@ -61,7 +61,8 @@ FunctionPass *llvm::createMachineSinkingPass() { return new MachineSinking(); }
 /// occur in blocks dominated by the specified block.
 bool MachineSinking::AllUsesDominatedByBlock(unsigned Reg, 
                                              MachineBasicBlock *MBB) const {
-  assert(MRegisterInfo::isVirtualRegister(Reg) && "Only makes sense for vregs");
+  assert(TargetRegisterInfo::isVirtualRegister(Reg) &&
+         "Only makes sense for vregs");
   for (MachineRegisterInfo::reg_iterator I = RegInfo->reg_begin(Reg),
        E = RegInfo->reg_end(); I != E; ++I) {
     if (I.getOperand().isDef()) continue;  // ignore def.
@@ -110,34 +111,40 @@ bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
 }
 
 bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
-  bool MadeChange = false;
-  
   // Can't sink anything out of a block that has less than two successors.
-  if (MBB.succ_size() <= 1) return false;
-  
-  // Walk the basic block bottom-up
-  for (MachineBasicBlock::iterator I = MBB.end(); I != MBB.begin(); ){
-    MachineBasicBlock::iterator LastIt = I;
-    if (SinkInstruction(--I)) {
-      I = LastIt;
-      ++NumSunk;
-    }
-  }
+  if (MBB.succ_size() <= 1 || MBB.empty()) return false;
+
+  bool MadeChange = false;
+
+  // Walk the basic block bottom-up.  Remember if we saw a store.
+  MachineBasicBlock::iterator I = MBB.end();
+  --I;
+  bool ProcessedBegin, SawStore = false;
+  do {
+    MachineInstr *MI = I;  // The instruction to sink.
+    
+    // Predecrement I (if it's not begin) so that it isn't invalidated by
+    // sinking.
+    ProcessedBegin = I == MBB.begin();
+    if (!ProcessedBegin)
+      --I;
+    
+    if (SinkInstruction(MI, SawStore))
+      ++NumSunk, MadeChange = true;
+    
+    // If we just processed the first instruction in the block, we're done.
+  } while (!ProcessedBegin);
   
   return MadeChange;
 }
 
 /// SinkInstruction - Determine whether it is safe to sink the specified machine
 /// instruction out of its current block into a successor.
-bool MachineSinking::SinkInstruction(MachineInstr *MI) {
-  // Don't sink things with side-effects we don't understand.
-  if (TII->hasUnmodelledSideEffects(MI))
+bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
+  // Check if it's safe to move the instruction.
+  if (!MI->isSafeToMove(TII, SawStore))
     return false;
   
-  // FIXME: we should be able to sink loads with no other side effects if there
-  // is nothing that can change memory from here until the end of block.  This
-  // is a trivial form of alias analysis.
-  
   // FIXME: This should include support for sinking instructions within the
   // block they are currently in to shorten the live ranges.  We often get
   // instructions sunk into the top of a large block, but it would be better to
@@ -161,7 +168,7 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI) {
     unsigned Reg = MO.getReg();
     if (Reg == 0) continue;
     
-    if (MRegisterInfo::isPhysicalRegister(Reg)) {
+    if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
       // If this is a physical register use, we can't move it.  If it is a def,
       // we can move it, but only if the def is dead.
       if (MO.isUse() || !MO.isDead())
@@ -169,6 +176,10 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI) {
     } else {
       // Virtual register uses are always safe to sink.
       if (MO.isUse()) continue;
+
+      // If it's not safe to move defs of the register class, then abort.
+      if (!TII->isSafeToMoveRegClassDefs(RegInfo->getRegClass(Reg)))
+        return false;
       
       // FIXME: This picks a successor to sink into based on having one
       // successor that dominates all the uses.  However, there are cases where
@@ -210,6 +221,16 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI) {
   // If there are no outputs, it must have side-effects.
   if (SuccToSinkTo == 0)
     return false;
+
+  // It's not safe to sink instructions to EH landing pad. Control flow into
+  // landing pad is implicitly defined.
+  if (SuccToSinkTo->isLandingPad())
+    return false;
+  
+  // If is not possible to sink an instruction into its own block.  This can
+  // happen with loops.
+  if (MI->getParent() == SuccToSinkTo)
+    return false;
   
   DEBUG(cerr << "Sink instr " << *MI);
   DEBUG(cerr << "to block " << *SuccToSinkTo);