Correct some thinkos in the expansion of ADD/SUB

[oota-llvm.git] / lib / CodeGen / MachineSink.cpp

diff --git a/lib/CodeGen/MachineSink.cpp b/lib/CodeGen/MachineSink.cpp
index 0665e87f67ad9a88e6aa42d0e32411dba6fc6cd9..0f608d637c537a7fd4c1afab8e111c33ff441393 100644 (file)
--- a/lib/CodeGen/MachineSink.cpp
+++ b/lib/CodeGen/MachineSink.cpp
@@ -15,7 +15,7 @@
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/MachineDominators.h"
-#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/ADT/SmallVector.h"
@@ -36,7 +36,7 @@ namespace {
 
   public:
     static char ID; // Pass identification
-    MachineSinking() : MachineFunctionPass((intptr_t)&ID) {}
+    MachineSinking() : MachineFunctionPass(&ID) {}
     
     virtual bool runOnMachineFunction(MachineFunction &MF);
     
@@ -47,13 +47,14 @@ namespace {
     }
   private:
     bool ProcessBlock(MachineBasicBlock &MBB);
-    bool SinkInstruction(MachineInstr *MI);
+    bool SinkInstruction(MachineInstr *MI, bool &SawStore);
     bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB) const;
   };
-  
-  char MachineSinking::ID = 0;
-  RegisterPass<MachineSinking> X("machine-sink", "Machine code sinking");
 } // end anonymous namespace
+  
+char MachineSinking::ID = 0;
+static RegisterPass<MachineSinking>
+X("machine-sink", "Machine code sinking");
 
 FunctionPass *llvm::createMachineSinkingPass() { return new MachineSinking(); }
 
@@ -61,7 +62,8 @@ FunctionPass *llvm::createMachineSinkingPass() { return new MachineSinking(); }
 /// occur in blocks dominated by the specified block.
 bool MachineSinking::AllUsesDominatedByBlock(unsigned Reg, 
                                              MachineBasicBlock *MBB) const {
-  assert(MRegisterInfo::isVirtualRegister(Reg) && "Only makes sense for vregs");
+  assert(TargetRegisterInfo::isVirtualRegister(Reg) &&
+         "Only makes sense for vregs");
   for (MachineRegisterInfo::reg_iterator I = RegInfo->reg_begin(Reg),
        E = RegInfo->reg_end(); I != E; ++I) {
     if (I.getOperand().isDef()) continue;  // ignore def.
@@ -115,10 +117,11 @@ bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
   // Can't sink anything out of a block that has less than two successors.
   if (MBB.succ_size() <= 1) return false;
   
-  // Walk the basic block bottom-up
+  // Walk the basic block bottom-up.  Remember if we saw a store.
+  bool SawStore = false;
   for (MachineBasicBlock::iterator I = MBB.end(); I != MBB.begin(); ){
     MachineBasicBlock::iterator LastIt = I;
-    if (SinkInstruction(--I)) {
+    if (SinkInstruction(--I, SawStore)) {
       I = LastIt;
       ++NumSunk;
     }
@@ -129,7 +132,19 @@ bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
 
 /// SinkInstruction - Determine whether it is safe to sink the specified machine
 /// instruction out of its current block into a successor.
-bool MachineSinking::SinkInstruction(MachineInstr *MI) {
+bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
+  // Check if it's safe to move the instruction.
+  if (!MI->isSafeToMove(TII, SawStore))
+    return false;
+  
+  // FIXME: This should include support for sinking instructions within the
+  // block they are currently in to shorten the live ranges.  We often get
+  // instructions sunk into the top of a large block, but it would be better to
+  // also sink them down before their first use in the block.  This xform has to
+  // be careful not to *increase* register pressure though, e.g. sinking
+  // "x = y + z" down if it kills y and z would increase the live ranges of y
+  // and z only the shrink the live range of x.
+  
   // Loop over all the operands of the specified instruction.  If there is
   // anything we can't handle, bail out.
   MachineBasicBlock *ParentBlock = MI->getParent();
@@ -145,7 +160,7 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI) {
     unsigned Reg = MO.getReg();
     if (Reg == 0) continue;
     
-    if (MRegisterInfo::isPhysicalRegister(Reg)) {
+    if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
       // If this is a physical register use, we can't move it.  If it is a def,
       // we can move it, but only if the def is dead.
       if (MO.isUse() || !MO.isDead())
@@ -154,6 +169,17 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI) {
       // Virtual register uses are always safe to sink.
       if (MO.isUse()) continue;
       
+      // FIXME: This picks a successor to sink into based on having one
+      // successor that dominates all the uses.  However, there are cases where
+      // sinking can happen but where the sink point isn't a successor.  For
+      // example:
+      //   x = computation
+      //   if () {} else {}
+      //   use x
+      // the instruction could be sunk over the whole diamond for the 
+      // if/then/else (or loop, etc), allowing it to be sunk into other blocks
+      // after that.
+      
       // Virtual register defs can only be sunk if all their uses are in blocks
       // dominated by one of the successors.
       if (SuccToSinkTo) {
@@ -180,7 +206,9 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI) {
     }
   }
   
-  // FIXME: Check that the instr doesn't have side effects etc.
+  // If there are no outputs, it must have side-effects.
+  if (SuccToSinkTo == 0)
+    return false;
   
   DEBUG(cerr << "Sink instr " << *MI);
   DEBUG(cerr << "to block " << *SuccToSinkTo);
@@ -188,6 +216,7 @@ bool MachineSinking::SinkInstruction(MachineInstr *MI) {
   // If the block has multiple predecessors, this would introduce computation on
   // a path that it doesn't already exist.  We could split the critical edge,
   // but for now we just punt.
+  // FIXME: Split critical edges if not backedges.
   if (SuccToSinkTo->pred_size() > 1) {
     DEBUG(cerr << " *** PUNTING: Critical edge found\n");
     return false;