//
//===----------------------------------------------------------------------===//
+#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
-#include "llvm/Support/CFG.h"
-#include "Support/STLExtras.h"
-
-namespace llvm {
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/STLExtras.h"
+using namespace llvm;
namespace {
struct PNE : public MachineFunctionPass {
}
-const PassInfo *PHIEliminationID = X.getPassInfo();
+const PassInfo *llvm::PHIEliminationID = X.getPassInfo();
/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
/// predecessor basic blocks.
return false; // Quick exit for normal case...
LiveVariables *LV = getAnalysisToUpdate<LiveVariables>();
- const TargetInstrInfo &MII = MF.getTarget().getInstrInfo();
+ const TargetInstrInfo &MII = *MF.getTarget().getInstrInfo();
const MRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
+ // VRegPHIUseCount - Keep track of the number of times each virtual register
+ // is used by PHI nodes in successors of this block.
+ DenseMap<unsigned, VirtReg2IndexFunctor> VRegPHIUseCount;
+ VRegPHIUseCount.grow(MF.getSSARegMap()->getLastVirtReg());
+
+ unsigned BBIsSuccOfPreds = 0; // Number of times MBB is a succ of preds
+ for (MachineBasicBlock::pred_iterator PI = MBB.pred_begin(),
+ E = MBB.pred_end(); PI != E; ++PI)
+ for (MachineBasicBlock::succ_iterator SI = (*PI)->succ_begin(),
+ E = (*PI)->succ_end(); SI != E; ++SI) {
+ BBIsSuccOfPreds += *SI == &MBB;
+ for (MachineBasicBlock::iterator BBI = (*SI)->begin(); BBI !=(*SI)->end() &&
+ BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
+ for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
+ VRegPHIUseCount[BBI->getOperand(i).getReg()]++;
+ }
+
+ // Get an iterator to the first instruction after the last PHI node (this may
+ // also be the end of the basic block). While we are scanning the PHIs,
+ // populate the VRegPHIUseCount map.
+ MachineBasicBlock::iterator AfterPHIsIt = MBB.begin();
+ while (AfterPHIsIt != MBB.end() &&
+ AfterPHIsIt->getOpcode() == TargetInstrInfo::PHI)
+ ++AfterPHIsIt; // Skip over all of the PHI nodes...
+
while (MBB.front().getOpcode() == TargetInstrInfo::PHI) {
- // Unlink the PHI node from the basic block... but don't delete the PHI yet
- MachineBasicBlock::iterator begin = MBB.begin();
- MachineInstr *MI = MBB.remove(begin);
+ // Unlink the PHI node from the basic block, but don't delete the PHI yet.
+ MachineInstr *MPhi = MBB.remove(MBB.begin());
- assert(MRegisterInfo::isVirtualRegister(MI->getOperand(0).getReg()) &&
+ assert(MRegisterInfo::isVirtualRegister(MPhi->getOperand(0).getReg()) &&
"PHI node doesn't write virt reg?");
- unsigned DestReg = MI->getOperand(0).getReg();
+ unsigned DestReg = MPhi->getOperand(0).getReg();
// Create a new register for the incoming PHI arguments
const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(DestReg);
// after any remaining phi nodes) which copies the new incoming register
// into the phi node destination.
//
- MachineBasicBlock::iterator AfterPHIsIt = MBB.begin();
- while (AfterPHIsIt != MBB.end() &&
- AfterPHIsIt->getOpcode() == TargetInstrInfo::PHI)
- ++AfterPHIsIt; // Skip over all of the PHI nodes...
RegInfo->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC);
// Update live variable information if there is any...
if (LV) {
- MachineInstr *PHICopy = --AfterPHIsIt;
+ MachineInstr *PHICopy = prior(AfterPHIsIt);
// Add information to LiveVariables to know that the incoming value is
// killed. Note that because the value is defined in several places (once
// each for each incoming block), the "def" block and instruction fields
// for the VarInfo is not filled in.
//
- LV->addVirtualRegisterKilled(IncomingReg, &MBB, PHICopy);
+ LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
// Since we are going to be deleting the PHI node, if it is the last use
// of any registers, or if the value itself is dead, we need to move this
- // information over to the new copy we just inserted...
+ // information over to the new copy we just inserted.
//
std::pair<LiveVariables::killed_iterator, LiveVariables::killed_iterator>
- RKs = LV->killed_range(MI);
+ RKs = LV->killed_range(MPhi);
std::vector<std::pair<MachineInstr*, unsigned> > Range;
- if (RKs.first != RKs.second) {
- // Copy the range into a vector...
- Range.assign(RKs.first, RKs.second);
-
- // Delete the range...
+ if (RKs.first != RKs.second) // Delete the range.
LV->removeVirtualRegistersKilled(RKs.first, RKs.second);
- // Add all of the kills back, which will update the appropriate info...
- for (unsigned i = 0, e = Range.size(); i != e; ++i)
- LV->addVirtualRegisterKilled(Range[i].second, &MBB, PHICopy);
- }
-
- RKs = LV->dead_range(MI);
+ RKs = LV->dead_range(MPhi);
if (RKs.first != RKs.second) {
// Works as above...
Range.assign(RKs.first, RKs.second);
LV->removeVirtualRegistersDead(RKs.first, RKs.second);
for (unsigned i = 0, e = Range.size(); i != e; ++i)
- LV->addVirtualRegisterDead(Range[i].second, &MBB, PHICopy);
+ LV->addVirtualRegisterDead(Range[i].second, PHICopy);
}
}
+ // Adjust the VRegPHIUseCount map to account for the removal of this PHI
+ // node.
+ for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
+ VRegPHIUseCount[MPhi->getOperand(i).getReg()] -= BBIsSuccOfPreds;
+
// Now loop over all of the incoming arguments, changing them to copy into
// the IncomingReg register in the corresponding predecessor basic block.
//
- for (int i = MI->getNumOperands() - 1; i >= 2; i-=2) {
- MachineOperand &opVal = MI->getOperand(i-1);
+ for (int i = MPhi->getNumOperands() - 1; i >= 2; i-=2) {
+ MachineOperand &opVal = MPhi->getOperand(i-1);
// Get the MachineBasicBlock equivalent of the BasicBlock that is the
// source path the PHI.
- MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock();
+ MachineBasicBlock &opBlock = *MPhi->getOperand(i).getMachineBasicBlock();
MachineBasicBlock::iterator I = opBlock.getFirstTerminator();
// at an appropriate point later.
//
bool ValueIsLive = false;
- const BasicBlock *BB = opBlock.getBasicBlock();
- for (succ_const_iterator SI = succ_begin(BB), E = succ_end(BB);
- SI != E && !ValueIsLive; ++SI) {
- const std::pair<MachineBasicBlock*, unsigned> &
- SuccInfo = LV->getBasicBlockInfo(*SI);
+ for (MachineBasicBlock::succ_iterator SI = opBlock.succ_begin(),
+ E = opBlock.succ_end(); SI != E && !ValueIsLive; ++SI) {
+ MachineBasicBlock *SuccMBB = *SI;
// Is it alive in this successor?
- unsigned SuccIdx = SuccInfo.second;
+ unsigned SuccIdx = SuccMBB->getNumber();
if (SuccIdx < InRegVI.AliveBlocks.size() &&
InRegVI.AliveBlocks[SuccIdx]) {
ValueIsLive = true;
}
// Is it killed in this successor?
- MachineBasicBlock *MBB = SuccInfo.first;
for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
- if (InRegVI.Kills[i].first == MBB) {
+ if (InRegVI.Kills[i]->getParent() == SuccMBB) {
ValueIsLive = true;
break;
}
// Is it used by any PHI instructions in this block?
- if (ValueIsLive) break;
-
- // Loop over all of the PHIs in this successor, checking to see if
- // the register is being used...
- for (MachineBasicBlock::iterator BBI = MBB->begin(), E=MBB->end();
- BBI != E && BBI->getOpcode() == TargetInstrInfo::PHI;
- ++BBI)
- for (unsigned i = 1, e = BBI->getNumOperands(); i < e; i += 2)
- if (BBI->getOperand(i).getReg() == SrcReg) {
- ValueIsLive = true;
- break;
- }
+ if (!ValueIsLive)
+ ValueIsLive = VRegPHIUseCount[SrcReg] != 0;
}
// Okay, if we now know that the value is not live out of the block,
//
if (!ValueIsLive) {
MachineBasicBlock::iterator Prev = prior(I);
- LV->addVirtualRegisterKilled(SrcReg, &opBlock, Prev);
+ LV->addVirtualRegisterKilled(SrcReg, Prev);
+
+ // This vreg no longer lives all of the way through opBlock.
+ unsigned opBlockNum = opBlock.getNumber();
+ if (opBlockNum < InRegVI.AliveBlocks.size())
+ InRegVI.AliveBlocks[opBlockNum] = false;
}
}
}
}
- // really delete the PHI instruction now!
- delete MI;
+ // Really delete the PHI instruction now!
+ delete MPhi;
}
return true;
}
-
-} // End llvm namespace