//===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
//
// This pass eliminates machine instruction PHI nodes by inserting copy
// instructions. This destroys SSA information, but is the desired input for
//
//===----------------------------------------------------------------------===//
+#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/CFG.h"
+#include "Support/STLExtras.h"
+using namespace llvm;
namespace {
struct PNE : public MachineFunctionPass {
"Eliminate PHI nodes for register allocation");
}
-const PassInfo *PHIEliminationID = X.getPassInfo();
+
+const PassInfo *llvm::PHIEliminationID = X.getPassInfo();
/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
/// predecessor basic blocks.
///
bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
- if (MBB.empty() || MBB.front()->getOpcode() != TargetInstrInfo::PHI)
+ if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
return false; // Quick exit for normal case...
LiveVariables *LV = getAnalysisToUpdate<LiveVariables>();
const TargetInstrInfo &MII = MF.getTarget().getInstrInfo();
const MRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
- while (MBB.front()->getOpcode() == TargetInstrInfo::PHI) {
- MachineInstr *MI = MBB.front();
+ while (MBB.front().getOpcode() == TargetInstrInfo::PHI) {
// Unlink the PHI node from the basic block... but don't delete the PHI yet
- MBB.erase(MBB.begin());
-
- assert(MI->getOperand(0).isVirtualRegister() &&
+ MachineBasicBlock::iterator begin = MBB.begin();
+ MachineInstr *MI = MBB.remove(begin);
+
+ assert(MRegisterInfo::isVirtualRegister(MI->getOperand(0).getReg()) &&
"PHI node doesn't write virt reg?");
- unsigned DestReg = MI->getOperand(0).getAllocatedRegNum();
+ unsigned DestReg = MI->getOperand(0).getReg();
// Create a new register for the incoming PHI arguments
const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(DestReg);
//
MachineBasicBlock::iterator AfterPHIsIt = MBB.begin();
while (AfterPHIsIt != MBB.end() &&
- (*AfterPHIsIt)->getOpcode() == TargetInstrInfo::PHI)
+ AfterPHIsIt->getOpcode() == TargetInstrInfo::PHI)
++AfterPHIsIt; // Skip over all of the PHI nodes...
RegInfo->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC);
// Update live variable information if there is any...
if (LV) {
- MachineInstr *PHICopy = *(AfterPHIsIt-1);
+ MachineInstr *PHICopy = --AfterPHIsIt;
// Add information to LiveVariables to know that the incoming value is
// killed. Note that because the value is defined in several places (once
// source path the PHI.
MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock();
- // Figure out where to insert the copy, which is at the end of the
- // predecessor basic block, but before any terminator/branch
- // instructions...
- MachineBasicBlock::iterator I = opBlock.end();
- if (I != opBlock.begin()) { // Handle empty blocks
- --I;
- // must backtrack over ALL the branches in the previous block
- while (MII.isTerminatorInstr((*I)->getOpcode()) &&
- I != opBlock.begin())
- --I;
-
- // move back to the first branch instruction so new instructions
- // are inserted right in front of it and not in front of a non-branch
- if (!MII.isTerminatorInstr((*I)->getOpcode()))
- ++I;
- }
+ MachineBasicBlock::iterator I = opBlock.getFirstTerminator();
// Check to make sure we haven't already emitted the copy for this block.
// This can happen because PHI nodes may have multiple entries for the
bool HaveNotEmitted = true;
if (I != opBlock.begin()) {
- MachineInstr *PrevInst = *(I-1);
+ MachineBasicBlock::iterator PrevInst = prior(I);
for (unsigned i = 0, e = PrevInst->getNumOperands(); i != e; ++i) {
MachineOperand &MO = PrevInst->getOperand(i);
- if (MO.isVirtualRegister() && MO.getReg() == IncomingReg)
- if (MO.opIsDefOnly() || MO.opIsDefAndUse()) {
+ if (MO.isRegister() && MO.getReg() == IncomingReg)
+ if (MO.isDef()) {
HaveNotEmitted = false;
break;
}
}
if (HaveNotEmitted) { // If the copy has not already been emitted, do it.
- assert(opVal.isVirtualRegister() &&
+ assert(MRegisterInfo::isVirtualRegister(opVal.getReg()) &&
"Machine PHI Operands must all be virtual registers!");
unsigned SrcReg = opVal.getReg();
RegInfo->copyRegToReg(opBlock, I, IncomingReg, SrcReg, RC);
//
LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg);
- // Loop over all of the successors of the basic block, checking to
- // see if the value is either live in the block, or if it is killed
- // in the block.
+ // Loop over all of the successors of the basic block, checking to see
+ // if the value is either live in the block, or if it is killed in the
+ // block. Also check to see if this register is in use by another PHI
+ // node which has not yet been eliminated. If so, it will be killed
+ // at an appropriate point later.
//
bool ValueIsLive = false;
- BasicBlock *BB = opBlock.getBasicBlock();
- for (succ_iterator SI = succ_begin(BB), E = succ_end(BB);
- SI != E; ++SI) {
+ const BasicBlock *BB = opBlock.getBasicBlock();
+ for (succ_const_iterator SI = succ_begin(BB), E = succ_end(BB);
+ SI != E && !ValueIsLive; ++SI) {
const std::pair<MachineBasicBlock*, unsigned> &
SuccInfo = LV->getBasicBlockInfo(*SI);
ValueIsLive = true;
break;
}
+
+ // Is it used by any PHI instructions in this block?
+ if (ValueIsLive) break;
+
+ // Loop over all of the PHIs in this successor, checking to see if
+ // the register is being used...
+ for (MachineBasicBlock::iterator BBI = MBB->begin(), E=MBB->end();
+ BBI != E && BBI->getOpcode() == TargetInstrInfo::PHI;
+ ++BBI)
+ for (unsigned i = 1, e = BBI->getNumOperands(); i < e; i += 2)
+ if (BBI->getOperand(i).getReg() == SrcReg) {
+ ValueIsLive = true;
+ break;
+ }
}
// Okay, if we now know that the value is not live out of the block,
// kills the incoming value!
//
if (!ValueIsLive) {
- // One more complication to worry about. There may actually be
- // multiple PHI nodes using this value on this branch. If we aren't
- // careful, the first PHI node will end up killing the value, not
- // letting it get the to the copy for the final PHI node in the
- // block. Therefore we have to check to see if there is already a
- // kill in this block, and if so, extend the lifetime to our new
- // copy.
- //
- for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
- if (InRegVI.Kills[i].first == &opBlock) {
- std::pair<LiveVariables::killed_iterator,
- LiveVariables::killed_iterator> Range
- = LV->killed_range(InRegVI.Kills[i].second);
- LV->removeVirtualRegistersKilled(Range.first, Range.second);
- break;
- }
-
- LV->addVirtualRegisterKilled(SrcReg, &opBlock, *(I-1));
+ MachineBasicBlock::iterator Prev = prior(I);
+ LV->addVirtualRegisterKilled(SrcReg, &opBlock, Prev);
}
}
}
// really delete the PHI instruction now!
delete MI;
}
-
return true;
}