public:
static char ID; // Pass identification, replacement for typeid
- PNE() : MachineFunctionPass((intptr_t)&ID) {}
+ PNE() : MachineFunctionPass(&ID) {}
virtual bool runOnMachineFunction(MachineFunction &Fn);
// Defs of PHI sources which are implicit_def.
SmallPtrSet<MachineInstr*, 4> ImpDefs;
};
-
- char PNE::ID = 0;
- RegisterPass<PNE> X("phi-node-elimination",
- "Eliminate PHI nodes for register allocation");
}
-const PassInfo *llvm::PHIEliminationID = X.getPassInfo();
+char PNE::ID = 0;
+static RegisterPass<PNE>
+X("phi-node-elimination", "Eliminate PHI nodes for register allocation");
+
+const PassInfo *const llvm::PHIEliminationID = &X;
bool PNE::runOnMachineFunction(MachineFunction &Fn) {
MRI = &Fn.getRegInfo();
E = ImpDefs.end(); I != E; ++I) {
MachineInstr *DefMI = *I;
unsigned DefReg = DefMI->getOperand(0).getReg();
- if (MRI->use_begin(DefReg) == MRI->use_end())
+ if (MRI->use_empty(DefReg))
DefMI->eraseFromParent();
}
return true;
}
-static bool isSourceDefinedByImplicitDef(MachineInstr *MPhi,
- MachineRegisterInfo *MRI) {
+/// isSourceDefinedByImplicitDef - Return true if all sources of the phi node
+/// are implicit_def's.
+static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi,
+ const MachineRegisterInfo *MRI) {
for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
unsigned SrcReg = MPhi->getOperand(i).getReg();
- MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
+ const MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
if (!DefMI || DefMI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF)
return false;
}
/// under the assuption that it needs to be lowered in a way that supports
/// atomic execution of PHIs. This lowering method is always correct all of the
/// time.
+///
void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
MachineBasicBlock::iterator AfterPHIsIt) {
// Unlink the PHI node from the basic block, but don't delete the PHI yet.
unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2;
unsigned DestReg = MPhi->getOperand(0).getReg();
+ bool isDead = MPhi->getOperand(0).isDead();
// Create a new register for the incoming PHI arguments.
MachineFunction &MF = *MBB.getParent();
const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
- unsigned IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
+ unsigned IncomingReg = 0;
- // Insert a register to register copy in the top of the current block (but
+ // Insert a register to register copy at the top of the current block (but
// after any remaining phi nodes) which copies the new incoming register
// into the phi node destination.
- //
const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
if (isSourceDefinedByImplicitDef(MPhi, MRI))
- // If all sources of a PHI node are implicit_def, just emit an implicit_def
- // instead of a copy.
- BuildMI(MBB, AfterPHIsIt, TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
- else
+ // If all sources of a PHI node are implicit_def, just emit an
+ // implicit_def instead of a copy.
+ BuildMI(MBB, AfterPHIsIt,
+ TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
+ else {
+ IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
+ }
- // Update live variable information if there is any...
+ // Update live variable information if there is any.
LiveVariables *LV = getAnalysisToUpdate<LiveVariables>();
if (LV) {
MachineInstr *PHICopy = prior(AfterPHIsIt);
- // Increment use count of the newly created virtual register.
- LV->getVarInfo(IncomingReg).NumUses++;
+ if (IncomingReg) {
+ // Increment use count of the newly created virtual register.
+ LV->getVarInfo(IncomingReg).NumUses++;
- // Add information to LiveVariables to know that the incoming value is
- // killed. Note that because the value is defined in several places (once
- // each for each incoming block), the "def" block and instruction fields
- // for the VarInfo is not filled in.
- //
- LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
+ // Add information to LiveVariables to know that the incoming value is
+ // killed. Note that because the value is defined in several places (once
+ // each for each incoming block), the "def" block and instruction fields
+ // for the VarInfo is not filled in.
+ LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
+
+ LV->getVarInfo(IncomingReg).UsedBlocks[MBB.getNumber()] = true;
+ }
- // Since we are going to be deleting the PHI node, if it is the last use
- // of any registers, or if the value itself is dead, we need to move this
+ // Since we are going to be deleting the PHI node, if it is the last use of
+ // any registers, or if the value itself is dead, we need to move this
// information over to the new copy we just inserted.
- //
LV->removeVirtualRegistersKilled(MPhi);
// If the result is dead, update LV.
- if (MPhi->registerDefIsDead(DestReg)) {
+ if (isDead) {
LV->addVirtualRegisterDead(DestReg, PHICopy);
- LV->removeVirtualRegistersDead(MPhi);
+ LV->removeVirtualRegisterDead(DestReg, MPhi);
}
-
- LV->getVarInfo(IncomingReg).UsedBlocks[MBB.getNumber()] = true;
}
- // Adjust the VRegPHIUseCount map to account for the removal of this PHI
- // node.
+ // Adjust the VRegPHIUseCount map to account for the removal of this PHI node.
for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
--VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i + 1).getMBB(),
MPhi->getOperand(i).getReg())];
- // Now loop over all of the incoming arguments, changing them to copy into
- // the IncomingReg register in the corresponding predecessor basic block.
- //
+ // Now loop over all of the incoming arguments, changing them to copy into the
+ // IncomingReg register in the corresponding predecessor basic block.
SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto;
for (int i = NumSrcs - 1; i >= 0; --i) {
unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
"Machine PHI Operands must all be virtual registers!");
- // If source is defined by an implicit def, there is no need to insert
- // a copy unless it's the only source.
+ // If source is defined by an implicit def, there is no need to insert a
+ // copy.
MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
if (DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {
ImpDefs.insert(DefMI);
continue;
}
- // Get the MachineBasicBlock equivalent of the BasicBlock that is the
- // source path the PHI.
+ // Get the MachineBasicBlock equivalent of the BasicBlock that is the source
+ // path the PHI.
MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB();
// Check to make sure we haven't already emitted the copy for this block.
- // This can happen because PHI nodes may have multiple entries for the
- // same basic block.
+ // This can happen because PHI nodes may have multiple entries for the same
+ // basic block.
if (!MBBsInsertedInto.insert(&opBlock))
continue; // If the copy has already been emitted, we're done.
- // Find a safe location to insert the copy, this may be the first
- // terminator in the block (or end()).
+ // Find a safe location to insert the copy, this may be the first terminator
+ // in the block (or end()).
MachineBasicBlock::iterator InsertPos = opBlock.getFirstTerminator();
-
+
// Insert the copy.
TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC);
// Now update live variable information if we have it. Otherwise we're done
if (!LV) continue;
- // We want to be able to insert a kill of the register if this PHI
- // (aka, the copy we just inserted) is the last use of the source
- // value. Live variable analysis conservatively handles this by
- // saying that the value is live until the end of the block the PHI
- // entry lives in. If the value really is dead at the PHI copy, there
- // will be no successor blocks which have the value live-in.
- //
- // Check to see if the copy is the last use, and if so, update the
- // live variables information so that it knows the copy source
- // instruction kills the incoming value.
+ // We want to be able to insert a kill of the register if this PHI (aka, the
+ // copy we just inserted) is the last use of the source value. Live
+ // variable analysis conservatively handles this by saying that the value is
+ // live until the end of the block the PHI entry lives in. If the value
+ // really is dead at the PHI copy, there will be no successor blocks which
+ // have the value live-in.
//
+ // Check to see if the copy is the last use, and if so, update the live
+ // variables information so that it knows the copy source instruction kills
+ // the incoming value.
LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg);
InRegVI.UsedBlocks[opBlock.getNumber()] = true;
- // Loop over all of the successors of the basic block, checking to see
- // if the value is either live in the block, or if it is killed in the
- // block. Also check to see if this register is in use by another PHI
- // node which has not yet been eliminated. If so, it will be killed
- // at an appropriate point later.
- //
+ // Loop over all of the successors of the basic block, checking to see if
+ // the value is either live in the block, or if it is killed in the block.
+ // Also check to see if this register is in use by another PHI node which
+ // has not yet been eliminated. If so, it will be killed at an appropriate
+ // point later.
// Is it used by any PHI instructions in this block?
bool ValueIsLive = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0;
}
}
- // Okay, if we now know that the value is not live out of the block,
- // we can add a kill marker in this block saying that it kills the incoming
- // value!
+ // Okay, if we now know that the value is not live out of the block, we can
+ // add a kill marker in this block saying that it kills the incoming value!
if (!ValueIsLive) {
// In our final twist, we have to decide which instruction kills the
- // register. In most cases this is the copy, however, the first
+ // register. In most cases this is the copy, however, the first
// terminator instruction at the end of the block may also use the value.
// In this case, we should mark *it* as being the killing block, not the
// copy.
}
// Really delete the PHI instruction now!
- delete MPhi;
+ MF.DeleteMachineInstr(MPhi);
++NumAtomic;
}
projects / oota-llvm.git / blobdiff