//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Compiler.h"
namespace {
struct VISIBILITY_HIDDEN PEI : public MachineFunctionPass {
static char ID;
- PEI() : MachineFunctionPass((intptr_t)&ID) {}
+ PEI() : MachineFunctionPass(&ID) {}
const char *getPassName() const {
return "Prolog/Epilog Insertion & Frame Finalization";
}
+ virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.addPreservedID(MachineLoopInfoID);
+ AU.addPreservedID(MachineDominatorsID);
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
+
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
/// frame indexes with appropriate references.
///
bool runOnMachineFunction(MachineFunction &Fn) {
- const MRegisterInfo *MRI = Fn.getTarget().getRegisterInfo();
- RS = MRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL;
+ const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
+ RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL;
// Get MachineModuleInfo so that we can track the construction of the
// frame.
- if (MachineModuleInfo *MMI = getAnalysisToUpdate<MachineModuleInfo>()) {
+ if (MachineModuleInfo *MMI = getAnalysisToUpdate<MachineModuleInfo>())
Fn.getFrameInfo()->setMachineModuleInfo(MMI);
- }
// Allow the target machine to make some adjustments to the function
// e.g. UsedPhysRegs before calculateCalleeSavedRegisters.
- MRI->processFunctionBeforeCalleeSavedScan(Fn, RS);
+ TRI->processFunctionBeforeCalleeSavedScan(Fn, RS);
// Scan the function for modified callee saved registers and insert spill
// code for any callee saved registers that are modified. Also calculate
// Allow the target machine to make final modifications to the function
// before the frame layout is finalized.
- Fn.getTarget().getRegisterInfo()->processFunctionBeforeFrameFinalized(Fn);
+ TRI->processFunctionBeforeFrameFinalized(Fn);
// Calculate actual frame offsets for all of the abstract stack objects...
calculateFrameObjectOffsets(Fn);
/// instructions.
///
void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) {
- const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
+ const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
const TargetFrameInfo *TFI = Fn.getTarget().getFrameInfo();
// Get the callee saved register list...
- const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
+ const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(&Fn);
// Get the function call frame set-up and tear-down instruction opcode
int FrameSetupOpcode = RegInfo->getCallFrameSetupOpcode();
I->getOpcode() == FrameDestroyOpcode) {
assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo"
" instructions should have a single immediate argument!");
- unsigned Size = I->getOperand(0).getImmedValue();
+ unsigned Size = I->getOperand(0).getImm();
if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
HasCalls = true;
FrameSDOps.push_back(I);
// function, thus needing to be saved and restored in the prolog/epilog.
//
const TargetRegisterClass* const *CSRegClasses =
- RegInfo->getCalleeSavedRegClasses();
+ RegInfo->getCalleeSavedRegClasses(&Fn);
std::vector<CalleeSavedInfo> CSI;
for (unsigned i = 0; CSRegs[i]; ++i) {
unsigned Reg = CSRegs[i];
- if (Fn.isPhysRegUsed(Reg)) {
+ if (Fn.getRegInfo().isPhysRegUsed(Reg)) {
// If the reg is modified, save it!
CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
} else {
for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
*AliasSet; ++AliasSet) { // Check alias registers too.
- if (Fn.isPhysRegUsed(*AliasSet)) {
+ if (Fn.getRegInfo().isPhysRegUsed(*AliasSet)) {
CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
break;
}
if (CSI.empty())
return;
- const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
+ const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
// Now that we have a stack slot for each register to be saved, insert spill
// code into the entry block.
MachineBasicBlock *MBB = Fn.begin();
MachineBasicBlock::iterator I = MBB->begin();
- if (!RegInfo->spillCalleeSavedRegisters(*MBB, I, CSI)) {
+
+ if (!TII.spillCalleeSavedRegisters(*MBB, I, CSI)) {
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
// Add the callee-saved register as live-in. It's killed at the spill.
MBB->addLiveIn(CSI[i].getReg());
// Insert the spill to the stack frame.
- RegInfo->storeRegToStackSlot(*MBB, I, CSI[i].getReg(),
+ TII.storeRegToStackSlot(*MBB, I, CSI[i].getReg(), true,
CSI[i].getFrameIdx(), CSI[i].getRegClass());
}
}
// Add code to restore the callee-save registers in each exiting block.
- const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
for (MachineFunction::iterator FI = Fn.begin(), E = Fn.end(); FI != E; ++FI)
// If last instruction is a return instruction, add an epilogue.
- if (!FI->empty() && TII.isReturn(FI->back().getOpcode())) {
+ if (!FI->empty() && FI->back().getDesc().isReturn()) {
MBB = FI;
I = MBB->end(); --I;
// Skip over all terminator instructions, which are part of the return
// sequence.
MachineBasicBlock::iterator I2 = I;
- while (I2 != MBB->begin() && TII.isTerminatorInstr((--I2)->getOpcode()))
+ while (I2 != MBB->begin() && (--I2)->getDesc().isTerminator())
I = I2;
bool AtStart = I == MBB->begin();
// Restore all registers immediately before the return and any terminators
// that preceed it.
- if (!RegInfo->restoreCalleeSavedRegisters(*MBB, I, CSI)) {
+ if (!TII.restoreCalleeSavedRegisters(*MBB, I, CSI)) {
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
- RegInfo->loadRegFromStackSlot(*MBB, I, CSI[i].getReg(),
+ TII.loadRegFromStackSlot(*MBB, I, CSI[i].getReg(),
CSI[i].getFrameIdx(),
CSI[i].getRegClass());
assert(I != MBB->begin() &&
// Loop over all of the stack objects, assigning sequential addresses...
MachineFrameInfo *FFI = Fn.getFrameInfo();
- unsigned MaxAlign = 0;
+ unsigned MaxAlign = FFI->getMaxAlignment();
// Start at the beginning of the local area.
// The Offset is the distance from the stack top in the direction
- // of stack growth -- so it's always positive.
+ // of stack growth -- so it's always nonnegative.
int64_t Offset = TFI.getOffsetOfLocalArea();
if (StackGrowsDown)
Offset = -Offset;
FFI->setObjectOffset(i, -Offset); // Set the computed offset
}
} else {
- for (unsigned i = MaxCSFrameIndex; i >= MinCSFrameIndex; --i) {
+ int MaxCSFI = MaxCSFrameIndex, MinCSFI = MinCSFrameIndex;
+ for (int i = MaxCSFI; i >= MinCSFI ; --i) {
unsigned Align = FFI->getObjectAlignment(i);
// If the alignment of this object is greater than that of the stack, then
// increase the stack alignment to match.
// Make sure the special register scavenging spill slot is closest to the
// frame pointer if a frame pointer is required.
- const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
+ const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
if (RS && RegInfo->hasFP(Fn)) {
int SFI = RS->getScavengingFrameIndex();
if (SFI >= 0) {
continue;
if (RS && (int)i == RS->getScavengingFrameIndex())
continue;
+ if (FFI->isDeadObjectIndex(i))
+ continue;
// If stack grows down, we need to add size of find the lowest
// address of the object.
// Make sure the special register scavenging spill slot is closest to the
// stack pointer.
- if (RS) {
+ if (RS && !RegInfo->hasFP(Fn)) {
int SFI = RS->getScavengingFrameIndex();
if (SFI >= 0) {
// If stack grows down, we need to add size of find the lowest
Offset += FFI->getObjectSize(SFI);
unsigned Align = FFI->getObjectAlignment(SFI);
+ // If the alignment of this object is greater than that of the
+ // stack, then increase the stack alignment to match.
+ MaxAlign = std::max(MaxAlign, Align);
// Adjust to alignment boundary
Offset = (Offset+Align-1)/Align*Align;
// Round up the size to a multiple of the alignment, but only if there are
// calls or alloca's in the function. This ensures that any calls to
// subroutines have their stack frames suitable aligned.
+ // Also do this if we need runtime alignment of the stack. In this case
+ // offsets will be relative to SP not FP; round up the stack size so this
+ // works.
if (!RegInfo->targetHandlesStackFrameRounding() &&
- (FFI->hasCalls() || FFI->hasVarSizedObjects())) {
+ (FFI->hasCalls() || FFI->hasVarSizedObjects() ||
+ (RegInfo->needsStackRealignment(Fn) &&
+ FFI->getObjectIndexEnd() != 0))) {
// If we have reserved argument space for call sites in the function
// immediately on entry to the current function, count it as part of the
// overall stack size.
if (RegInfo->hasReservedCallFrame(Fn))
Offset += FFI->getMaxCallFrameSize();
- unsigned AlignMask = TFI.getStackAlignment() - 1;
+ unsigned AlignMask = std::max(TFI.getStackAlignment(),MaxAlign) - 1;
Offset = (Offset + AlignMask) & ~uint64_t(AlignMask);
}
// Remember the required stack alignment in case targets need it to perform
// dynamic stack alignment.
- assert(FFI->getMaxAlignment() == MaxAlign &&
- "Stack alignment calculation broken!");
+ FFI->setMaxAlignment(MaxAlign);
}
/// prolog and epilog code to the function.
///
void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
+ const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
+
// Add prologue to the function...
- Fn.getTarget().getRegisterInfo()->emitPrologue(Fn);
+ TRI->emitPrologue(Fn);
// Add epilogue to restore the callee-save registers in each exiting block
- const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
// If last instruction is a return instruction, add an epilogue
- if (!I->empty() && TII.isReturn(I->back().getOpcode()))
- Fn.getTarget().getRegisterInfo()->emitEpilogue(Fn, *I);
+ if (!I->empty() && I->back().getDesc().isReturn())
+ TRI->emitEpilogue(Fn, *I);
}
}
const TargetMachine &TM = Fn.getTarget();
assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
- const MRegisterInfo &MRI = *TM.getRegisterInfo();
+ const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
const TargetFrameInfo *TFI = TM.getFrameInfo();
bool StackGrowsDown =
TFI->getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown;
- int FrameSetupOpcode = MRI.getCallFrameSetupOpcode();
- int FrameDestroyOpcode = MRI.getCallFrameDestroyOpcode();
+ int FrameSetupOpcode = TRI.getCallFrameSetupOpcode();
+ int FrameDestroyOpcode = TRI.getCallFrameDestroyOpcode();
for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) {
int SPAdj = 0; // SP offset due to call frame setup / destroy.
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
MachineInstr *MI = I;
- // Remember how much SP has been adjustment to create the call frame.
+ if (I->getOpcode() == TargetInstrInfo::DECLARE) {
+ // Ignore it.
+ ++I;
+ continue;
+ }
+
if (I->getOpcode() == FrameSetupOpcode ||
I->getOpcode() == FrameDestroyOpcode) {
- int Size = I->getOperand(0).getImmedValue();
+ // Remember how much SP has been adjusted to create the call
+ // frame.
+ int Size = I->getOperand(0).getImm();
+
if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
(StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
Size = -Size;
+
SPAdj += Size;
+
MachineBasicBlock::iterator PrevI = prior(I);
- MRI.eliminateCallFramePseudoInstr(Fn, *BB, I);
+ TRI.eliminateCallFramePseudoInstr(Fn, *BB, I);
+
// Visit the instructions created by eliminateCallFramePseudoInstr().
I = next(PrevI);
- MI = NULL;
- } else {
- I++;
- for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
- if (MI->getOperand(i).isFrameIndex()) {
- // If this instruction has a FrameIndex operand, we need to use that
- // target machine register info object to eliminate it.
- MRI.eliminateFrameIndex(MI, SPAdj, RS);
-
- // Revisit the instruction in full. Some instructions (e.g. inline
- // asm instructions) can have multiple frame indices.
- --I;
- MI = 0;
- break;
- }
+ continue;
}
+
+ bool DoIncr = true;
+
+ for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
+ if (MI->getOperand(i).isFI()) {
+ // Some instructions (e.g. inline asm instructions) can have
+ // multiple frame indices and/or cause eliminateFrameIndex
+ // to insert more than one instruction. We need the register
+ // scavenger to go through all of these instructions so that
+ // it can update its register information. We keep the
+ // iterator at the point before insertion so that we can
+ // revisit them in full.
+ bool AtBeginning = (I == BB->begin());
+ if (!AtBeginning) --I;
+
+ // If this instruction has a FrameIndex operand, we need to
+ // use that target machine register info object to eliminate
+ // it.
+ TRI.eliminateFrameIndex(MI, SPAdj, RS);
+
+ // Reset the iterator if we were at the beginning of the BB.
+ if (AtBeginning) {
+ I = BB->begin();
+ DoIncr = false;
+ }
+
+ MI = 0;
+ break;
+ }
+
+ if (DoIncr) ++I;
+
// Update register states.
if (RS && MI) RS->forward(MI);
}
+
assert(SPAdj == 0 && "Unbalanced call frame setup / destroy pairs?");
}
}
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