Be nice to CellSPU: for this target getSetCCResultType

[oota-llvm.git] / lib / CodeGen / PrologEpilogInserter.cpp

diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp
index be8a54e03d1c60923fac4c8c1289901cf573fb13..d3b0b11c705957eb2a720b6de1fd0d5e3727a186 100644 (file)
--- a/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/lib/CodeGen/PrologEpilogInserter.cpp
@@ -35,12 +35,18 @@ using namespace llvm;
 namespace {
   struct VISIBILITY_HIDDEN PEI : public MachineFunctionPass {
     static char ID;
-    PEI() : MachineFunctionPass((intptr_t)&ID) {}
+    PEI() : MachineFunctionPass(&ID) {}
 
     const char *getPassName() const {
       return "Prolog/Epilog Insertion & Frame Finalization";
     }
 
+    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+      AU.addPreservedID(MachineLoopInfoID);
+      AU.addPreservedID(MachineDominatorsID);
+      MachineFunctionPass::getAnalysisUsage(AU);
+    }
+
     /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
     /// frame indexes with appropriate references.
     ///
@@ -554,7 +560,7 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) {
       bool DoIncr = true;
 
       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
-        if (MI->getOperand(i).isFrameIndex()) {
+        if (MI->getOperand(i).isFI()) {
           // Some instructions (e.g. inline asm instructions) can have
           // multiple frame indices and/or cause eliminateFrameIndex
           // to insert more than one instruction. We need the register