#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
+#include "llvm/CodeGen/RegisterCoalescer.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetMachine.h"
#include <cmath>
using namespace llvm;
-namespace {
-
- static Statistic<> NumIters
- ("regalloc", "Number of iterations performed");
- static Statistic<> NumBacktracks
- ("regalloc", "Number of times we had to backtrack");
+STATISTIC(NumIters , "Number of iterations performed");
+STATISTIC(NumBacktracks, "Number of times we had to backtrack");
- static RegisterRegAlloc
- linearscanRegAlloc("linearscan", " linear scan register allocator",
- createLinearScanRegisterAllocator);
+static RegisterRegAlloc
+linearscanRegAlloc("linearscan", " linear scan register allocator",
+ createLinearScanRegisterAllocator);
- static unsigned numIterations = 0;
- static unsigned numIntervals = 0;
+namespace {
+ struct VISIBILITY_HIDDEN RALinScan : public MachineFunctionPass {
+ static char ID;
+ RALinScan() : MachineFunctionPass((intptr_t)&ID) {}
- struct VISIBILITY_HIDDEN RA : public MachineFunctionPass {
typedef std::pair<LiveInterval*, LiveInterval::iterator> IntervalPtr;
typedef std::vector<IntervalPtr> IntervalPtrs;
private:
const TargetMachine* tm_;
const MRegisterInfo* mri_;
LiveIntervals* li_;
- bool *PhysRegsUsed;
/// handled_ - Intervals are added to the handled_ set in the order of their
/// start value. This is uses for backtracking.
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<LiveIntervals>();
+ // Make sure PassManager knows which analyses to make available
+ // to coalescing and which analyses coalescing invalidates.
+ AU.addRequiredTransitive<RegisterCoalescer>();
MachineFunctionPass::getAnalysisUsage(AU);
}
}
}
};
+ char RALinScan::ID = 0;
}
-void RA::ComputeRelatedRegClasses() {
+void RALinScan::ComputeRelatedRegClasses() {
const MRegisterInfo &MRI = *mri_;
// First pass, add all reg classes to the union, and determine at least one
RelatedRegClasses.unionSets(I->second, OneClassForEachPhysReg[*AS]);
}
-bool RA::runOnMachineFunction(MachineFunction &fn) {
+bool RALinScan::runOnMachineFunction(MachineFunction &fn) {
mf_ = &fn;
tm_ = &fn.getTarget();
mri_ = tm_->getRegisterInfo();
li_ = &getAnalysis<LiveIntervals>();
+ // We don't run the coalescer here because we have no reason to
+ // interact with it. If the coalescer requires interaction, it
+ // won't do anything. If it doesn't require interaction, we assume
+ // it was run as a separate pass.
+
// If this is the first function compiled, compute the related reg classes.
if (RelatedRegClasses.empty())
ComputeRelatedRegClasses();
- PhysRegsUsed = new bool[mri_->getNumRegs()];
- std::fill(PhysRegsUsed, PhysRegsUsed+mri_->getNumRegs(), false);
- fn.setUsedPhysRegs(PhysRegsUsed);
-
if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
vrm_.reset(new VirtRegMap(*mf_));
if (!spiller_.get()) spiller_.reset(createSpiller());
// Rewrite spill code and update the PhysRegsUsed set.
spiller_->runOnMachineFunction(*mf_, *vrm_);
-
vrm_.reset(); // Free the VirtRegMap
-
while (!unhandled_.empty()) unhandled_.pop();
fixed_.clear();
active_.clear();
/// initIntervalSets - initialize the interval sets.
///
-void RA::initIntervalSets()
+void RALinScan::initIntervalSets()
{
assert(unhandled_.empty() && fixed_.empty() &&
active_.empty() && inactive_.empty() &&
for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
- PhysRegsUsed[i->second.reg] = true;
+ mf_->setPhysRegUsed(i->second.reg);
fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
} else
unhandled_.push(&i->second);
}
}
-void RA::linearScan()
+void RALinScan::linearScan()
{
// linear scan algorithm
DOUT << "********** LINEAR SCAN **********\n";
DOUT << "********** Function: " << mf_->getFunction()->getName() << '\n';
- // DEBUG(printIntervals("unhandled", unhandled_.begin(), unhandled_.end()));
DEBUG(printIntervals("fixed", fixed_.begin(), fixed_.end()));
- DEBUG(printIntervals("active", active_.begin(), active_.end()));
- DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
while (!unhandled_.empty()) {
// pick the interval with the earliest start point
LiveInterval* cur = unhandled_.top();
unhandled_.pop();
- ++numIterations;
+ ++NumIters;
DOUT << "\n*** CURRENT ***: " << *cur << '\n';
processActiveIntervals(cur->beginNumber());
DEBUG(printIntervals("active", active_.begin(), active_.end()));
DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
}
- numIntervals += li_->getNumIntervals();
- NumIters += numIterations;
// expire any remaining active intervals
- for (IntervalPtrs::reverse_iterator
- i = active_.rbegin(); i != active_.rend(); ) {
- unsigned reg = i->first->reg;
- DOUT << "\tinterval " << *i->first << " expired\n";
+ while (!active_.empty()) {
+ IntervalPtr &IP = active_.back();
+ unsigned reg = IP.first->reg;
+ DOUT << "\tinterval " << *IP.first << " expired\n";
assert(MRegisterInfo::isVirtualRegister(reg) &&
"Can only allocate virtual registers!");
reg = vrm_->getPhys(reg);
prt_->delRegUse(reg);
- i = IntervalPtrs::reverse_iterator(active_.erase(i.base()-1));
+ active_.pop_back();
}
// expire any remaining inactive intervals
- for (IntervalPtrs::reverse_iterator
- i = inactive_.rbegin(); i != inactive_.rend(); ) {
- DOUT << "\tinterval " << *i->first << " expired\n";
- i = IntervalPtrs::reverse_iterator(inactive_.erase(i.base()-1));
+ DEBUG(for (IntervalPtrs::reverse_iterator
+ i = inactive_.rbegin(); i != inactive_.rend(); )
+ DOUT << "\tinterval " << *i->first << " expired\n");
+ inactive_.clear();
+
+ // Add live-ins to every BB except for entry.
+ MachineFunction::iterator EntryMBB = mf_->begin();
+ SmallVector<MachineBasicBlock*, 8> LiveInMBBs;
+ for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
+ const LiveInterval &cur = i->second;
+ unsigned Reg = 0;
+ if (MRegisterInfo::isPhysicalRegister(cur.reg))
+ Reg = i->second.reg;
+ else if (vrm_->isAssignedReg(cur.reg))
+ Reg = vrm_->getPhys(cur.reg);
+ if (!Reg)
+ continue;
+ for (LiveInterval::Ranges::const_iterator I = cur.begin(), E = cur.end();
+ I != E; ++I) {
+ const LiveRange &LR = *I;
+ if (li_->findLiveInMBBs(LR, LiveInMBBs)) {
+ for (unsigned i = 0, e = LiveInMBBs.size(); i != e; ++i)
+ if (LiveInMBBs[i] != EntryMBB)
+ LiveInMBBs[i]->addLiveIn(Reg);
+ LiveInMBBs.clear();
+ }
+ }
}
DOUT << *vrm_;
/// processActiveIntervals - expire old intervals and move non-overlapping ones
/// to the inactive list.
-void RA::processActiveIntervals(unsigned CurPoint)
+void RALinScan::processActiveIntervals(unsigned CurPoint)
{
DOUT << "\tprocessing active intervals:\n";
/// processInactiveIntervals - expire old intervals and move overlapping
/// ones to the active list.
-void RA::processInactiveIntervals(unsigned CurPoint)
+void RALinScan::processInactiveIntervals(unsigned CurPoint)
{
DOUT << "\tprocessing inactive intervals:\n";
Weights[*as] += weight;
}
-static RA::IntervalPtrs::iterator FindIntervalInVector(RA::IntervalPtrs &IP,
- LiveInterval *LI) {
- for (RA::IntervalPtrs::iterator I = IP.begin(), E = IP.end(); I != E; ++I)
+static
+RALinScan::IntervalPtrs::iterator
+FindIntervalInVector(RALinScan::IntervalPtrs &IP, LiveInterval *LI) {
+ for (RALinScan::IntervalPtrs::iterator I = IP.begin(), E = IP.end();
+ I != E; ++I)
if (I->first == LI) return I;
return IP.end();
}
-static void RevertVectorIteratorsTo(RA::IntervalPtrs &V, unsigned Point) {
+static void RevertVectorIteratorsTo(RALinScan::IntervalPtrs &V, unsigned Point){
for (unsigned i = 0, e = V.size(); i != e; ++i) {
- RA::IntervalPtr &IP = V[i];
+ RALinScan::IntervalPtr &IP = V[i];
LiveInterval::iterator I = std::upper_bound(IP.first->begin(),
IP.second, Point);
if (I != IP.first->begin()) --I;
/// assignRegOrStackSlotAtInterval - assign a register if one is available, or
/// spill.
-void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
+void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
{
DOUT << "\tallocating current interval: ";
// Find a register to spill.
float minWeight = HUGE_VALF;
- unsigned minReg = 0;
- for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
- e = RC->allocation_order_end(*mf_); i != e; ++i) {
- unsigned reg = *i;
- if (minWeight > SpillWeights[reg]) {
- minWeight = SpillWeights[reg];
- minReg = reg;
+ unsigned minReg = cur->preference; // Try the preferred register first.
+
+ if (!minReg || SpillWeights[minReg] == HUGE_VALF)
+ for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
+ e = RC->allocation_order_end(*mf_); i != e; ++i) {
+ unsigned reg = *i;
+ if (minWeight > SpillWeights[reg]) {
+ minWeight = SpillWeights[reg];
+ minReg = reg;
+ }
}
- }
// If we didn't find a register that is spillable, try aliases?
if (!minReg) {
// linearscan.
if (cur->weight != HUGE_VALF && cur->weight <= minWeight) {
DOUT << "\t\t\tspilling(c): " << *cur << '\n';
- int slot = vrm_->assignVirt2StackSlot(cur->reg);
std::vector<LiveInterval*> added =
- li_->addIntervalsForSpills(*cur, *vrm_, slot);
+ li_->addIntervalsForSpills(*cur, *vrm_, cur->reg);
if (added.empty())
return; // Early exit if all spills were folded.
std::vector<LiveInterval*> added;
assert(MRegisterInfo::isPhysicalRegister(minReg) &&
"did not choose a register to spill?");
- std::vector<bool> toSpill(mri_->getNumRegs(), false);
+ BitVector toSpill(mri_->getNumRegs());
// We are going to spill minReg and all its aliases.
toSpill[minReg] = true;
cur->overlapsFrom(*i->first, i->second)) {
DOUT << "\t\t\tspilling(a): " << *i->first << '\n';
earliestStart = std::min(earliestStart, i->first->beginNumber());
- int slot = vrm_->assignVirt2StackSlot(i->first->reg);
std::vector<LiveInterval*> newIs =
- li_->addIntervalsForSpills(*i->first, *vrm_, slot);
+ li_->addIntervalsForSpills(*i->first, *vrm_, reg);
std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
spilled.insert(reg);
}
cur->overlapsFrom(*i->first, i->second-1)) {
DOUT << "\t\t\tspilling(i): " << *i->first << '\n';
earliestStart = std::min(earliestStart, i->first->beginNumber());
- int slot = vrm_->assignVirt2StackSlot(reg);
std::vector<LiveInterval*> newIs =
- li_->addIntervalsForSpills(*i->first, *vrm_, slot);
+ li_->addIntervalsForSpills(*i->first, *vrm_, reg);
std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
spilled.insert(reg);
}
/// getFreePhysReg - return a free physical register for this virtual register
/// interval if we have one, otherwise return 0.
-unsigned RA::getFreePhysReg(LiveInterval *cur) {
+unsigned RALinScan::getFreePhysReg(LiveInterval *cur) {
std::vector<unsigned> inactiveCounts(mri_->getNumRegs(), 0);
unsigned MaxInactiveCount = 0;
}
}
- const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
-
unsigned FreeReg = 0;
unsigned FreeRegInactiveCount = 0;
-
+
+ // If copy coalescer has assigned a "preferred" register, check if it's
+ // available first.
+ if (cur->preference)
+ if (prt_->isRegAvail(cur->preference)) {
+ DOUT << "\t\tassigned the preferred register: "
+ << mri_->getName(cur->preference) << "\n";
+ return cur->preference;
+ } else
+ DOUT << "\t\tunable to assign the preferred register: "
+ << mri_->getName(cur->preference) << "\n";
+
// Scan for the first available register.
- TargetRegisterClass::iterator I = rc->allocation_order_begin(*mf_);
- TargetRegisterClass::iterator E = rc->allocation_order_end(*mf_);
+ TargetRegisterClass::iterator I = RC->allocation_order_begin(*mf_);
+ TargetRegisterClass::iterator E = RC->allocation_order_end(*mf_);
for (; I != E; ++I)
if (prt_->isRegAvail(*I)) {
FreeReg = *I;
}
FunctionPass* llvm::createLinearScanRegisterAllocator() {
- return new RA();
+ return new RALinScan();
}
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