//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "regalloc"
+#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "PhysRegTracker.h"
#include "VirtRegMap.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/CodeGen/SSARegMap.h"
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Debug.h"
-#include "llvm/Support/Visibility.h"
+#include "llvm/Support/Compiler.h"
#include <algorithm>
-#include <cmath>
-#include <iostream>
#include <set>
#include <queue>
#include <memory>
+#include <cmath>
using namespace llvm;
-namespace {
+STATISTIC(NumIters , "Number of iterations performed");
+STATISTIC(NumBacktracks, "Number of times we had to backtrack");
- Statistic<double> efficiency
- ("regalloc", "Ratio of intervals processed over total intervals");
- Statistic<> NumBacktracks("regalloc", "Number of times we had to backtrack");
+static RegisterRegAlloc
+linearscanRegAlloc("linearscan", " linear scan register allocator",
+ createLinearScanRegisterAllocator);
+namespace {
static unsigned numIterations = 0;
static unsigned numIntervals = 0;
const TargetMachine* tm_;
const MRegisterInfo* mri_;
LiveIntervals* li_;
- bool *PhysRegsUsed;
/// handled_ - Intervals are added to the handled_ set in the order of their
/// start value. This is uses for backtracking.
template <typename ItTy>
void printIntervals(const char* const str, ItTy i, ItTy e) const {
- if (str) std::cerr << str << " intervals:\n";
+ if (str) DOUT << str << " intervals:\n";
for (; i != e; ++i) {
- std::cerr << "\t" << *i->first << " -> ";
+ DOUT << "\t" << *i->first << " -> ";
unsigned reg = i->first->reg;
if (MRegisterInfo::isVirtualRegister(reg)) {
reg = vrm_->getPhys(reg);
}
- std::cerr << mri_->getName(reg) << '\n';
+ DOUT << mri_->getName(reg) << '\n';
}
}
};
if (RelatedRegClasses.empty())
ComputeRelatedRegClasses();
- PhysRegsUsed = new bool[mri_->getNumRegs()];
- std::fill(PhysRegsUsed, PhysRegsUsed+mri_->getNumRegs(), false);
- fn.setUsedPhysRegs(PhysRegsUsed);
-
if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
vrm_.reset(new VirtRegMap(*mf_));
if (!spiller_.get()) spiller_.reset(createSpiller());
for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
- PhysRegsUsed[i->second.reg] = true;
+ mf_->setPhysRegUsed(i->second.reg);
fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
} else
unhandled_.push(&i->second);
void RA::linearScan()
{
// linear scan algorithm
- DEBUG(std::cerr << "********** LINEAR SCAN **********\n");
- DEBUG(std::cerr << "********** Function: "
- << mf_->getFunction()->getName() << '\n');
+ DOUT << "********** LINEAR SCAN **********\n";
+ DOUT << "********** Function: " << mf_->getFunction()->getName() << '\n';
// DEBUG(printIntervals("unhandled", unhandled_.begin(), unhandled_.end()));
DEBUG(printIntervals("fixed", fixed_.begin(), fixed_.end()));
LiveInterval* cur = unhandled_.top();
unhandled_.pop();
++numIterations;
- DEBUG(std::cerr << "\n*** CURRENT ***: " << *cur << '\n');
+ DOUT << "\n*** CURRENT ***: " << *cur << '\n';
processActiveIntervals(cur->beginNumber());
processInactiveIntervals(cur->beginNumber());
DEBUG(printIntervals("inactive", inactive_.begin(), inactive_.end()));
}
numIntervals += li_->getNumIntervals();
- efficiency = double(numIterations) / double(numIntervals);
+ NumIters += numIterations;
// expire any remaining active intervals
for (IntervalPtrs::reverse_iterator
i = active_.rbegin(); i != active_.rend(); ) {
unsigned reg = i->first->reg;
- DEBUG(std::cerr << "\tinterval " << *i->first << " expired\n");
+ DOUT << "\tinterval " << *i->first << " expired\n";
assert(MRegisterInfo::isVirtualRegister(reg) &&
"Can only allocate virtual registers!");
reg = vrm_->getPhys(reg);
// expire any remaining inactive intervals
for (IntervalPtrs::reverse_iterator
i = inactive_.rbegin(); i != inactive_.rend(); ) {
- DEBUG(std::cerr << "\tinterval " << *i->first << " expired\n");
+ DOUT << "\tinterval " << *i->first << " expired\n";
i = IntervalPtrs::reverse_iterator(inactive_.erase(i.base()-1));
}
- DEBUG(std::cerr << *vrm_);
+ // A brute force way of adding live-ins to every BB.
+ MachineFunction::iterator MBB = mf_->begin();
+ ++MBB; // Skip entry MBB.
+ for (MachineFunction::iterator E = mf_->end(); MBB != E; ++MBB) {
+ unsigned StartIdx = li_->getMBBStartIdx(MBB->getNumber());
+ for (IntervalPtrs::iterator i = fixed_.begin(), e = fixed_.end();
+ i != e; ++i)
+ if (i->first->liveAt(StartIdx))
+ MBB->addLiveIn(i->first->reg);
+
+ for (unsigned i = 0, e = handled_.size(); i != e; ++i) {
+ LiveInterval *HI = handled_[i];
+ unsigned Reg = HI->reg;
+ if (!vrm_->hasStackSlot(Reg) && HI->liveAt(StartIdx)) {
+ assert(MRegisterInfo::isVirtualRegister(Reg));
+ Reg = vrm_->getPhys(Reg);
+ MBB->addLiveIn(Reg);
+ }
+ }
+ }
+
+ DOUT << *vrm_;
}
/// processActiveIntervals - expire old intervals and move non-overlapping ones
/// to the inactive list.
void RA::processActiveIntervals(unsigned CurPoint)
{
- DEBUG(std::cerr << "\tprocessing active intervals:\n");
+ DOUT << "\tprocessing active intervals:\n";
for (unsigned i = 0, e = active_.size(); i != e; ++i) {
LiveInterval *Interval = active_[i].first;
IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
if (IntervalPos == Interval->end()) { // Remove expired intervals.
- DEBUG(std::cerr << "\t\tinterval " << *Interval << " expired\n");
+ DOUT << "\t\tinterval " << *Interval << " expired\n";
assert(MRegisterInfo::isVirtualRegister(reg) &&
"Can only allocate virtual registers!");
reg = vrm_->getPhys(reg);
} else if (IntervalPos->start > CurPoint) {
// Move inactive intervals to inactive list.
- DEBUG(std::cerr << "\t\tinterval " << *Interval << " inactive\n");
+ DOUT << "\t\tinterval " << *Interval << " inactive\n";
assert(MRegisterInfo::isVirtualRegister(reg) &&
"Can only allocate virtual registers!");
reg = vrm_->getPhys(reg);
/// ones to the active list.
void RA::processInactiveIntervals(unsigned CurPoint)
{
- DEBUG(std::cerr << "\tprocessing inactive intervals:\n");
+ DOUT << "\tprocessing inactive intervals:\n";
for (unsigned i = 0, e = inactive_.size(); i != e; ++i) {
LiveInterval *Interval = inactive_[i].first;
IntervalPos = Interval->advanceTo(IntervalPos, CurPoint);
if (IntervalPos == Interval->end()) { // remove expired intervals.
- DEBUG(std::cerr << "\t\tinterval " << *Interval << " expired\n");
+ DOUT << "\t\tinterval " << *Interval << " expired\n";
// Pop off the end of the list.
inactive_[i] = inactive_.back();
--i; --e;
} else if (IntervalPos->start <= CurPoint) {
// move re-activated intervals in active list
- DEBUG(std::cerr << "\t\tinterval " << *Interval << " active\n");
+ DOUT << "\t\tinterval " << *Interval << " active\n";
assert(MRegisterInfo::isVirtualRegister(reg) &&
"Can only allocate virtual registers!");
reg = vrm_->getPhys(reg);
/// spill.
void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
{
- DEBUG(std::cerr << "\tallocating current interval: ");
+ DOUT << "\tallocating current interval: ";
PhysRegTracker backupPrt = *prt_;
bool ConflictsWithFixed = false;
for (unsigned i = 0, e = fixed_.size(); i != e; ++i) {
- if (physReg == fixed_[i].first->reg ||
- RegAliases.count(fixed_[i].first->reg)) {
+ IntervalPtr &IP = fixed_[i];
+ if (physReg == IP.first->reg || RegAliases.count(IP.first->reg)) {
// Okay, this reg is on the fixed list. Check to see if we actually
// conflict.
- IntervalPtr &IP = fixed_[i];
LiveInterval *I = IP.first;
if (I->endNumber() > StartPosition) {
LiveInterval::iterator II = I->advanceTo(IP.second, StartPosition);
// the free physical register and add this interval to the active
// list.
if (physReg) {
- DEBUG(std::cerr << mri_->getName(physReg) << '\n');
+ DOUT << mri_->getName(physReg) << '\n';
vrm_->assignVirt2Phys(cur->reg, physReg);
prt_->addRegUse(physReg);
active_.push_back(std::make_pair(cur, cur->begin()));
handled_.push_back(cur);
return;
}
- DEBUG(std::cerr << "no free registers\n");
+ DOUT << "no free registers\n";
// Compile the spill weights into an array that is better for scanning.
std::vector<float> SpillWeights(mri_->getNumRegs(), 0.0);
updateSpillWeights(SpillWeights, reg, i->first->weight, mri_);
}
- DEBUG(std::cerr << "\tassigning stack slot at interval "<< *cur << ":\n");
+ DOUT << "\tassigning stack slot at interval "<< *cur << ":\n";
// Find a register to spill.
- float minWeight = float(HUGE_VAL);
- unsigned minReg = 0;
- for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
- e = RC->allocation_order_end(*mf_); i != e; ++i) {
- unsigned reg = *i;
- if (minWeight > SpillWeights[reg]) {
- minWeight = SpillWeights[reg];
- minReg = reg;
+ float minWeight = HUGE_VALF;
+ unsigned minReg = cur->preference; // Try the preferred register first.
+
+ if (!minReg || SpillWeights[minReg] == HUGE_VALF)
+ for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_),
+ e = RC->allocation_order_end(*mf_); i != e; ++i) {
+ unsigned reg = *i;
+ if (minWeight > SpillWeights[reg]) {
+ minWeight = SpillWeights[reg];
+ minReg = reg;
+ }
}
- }
// If we didn't find a register that is spillable, try aliases?
if (!minReg) {
minReg = *RC->allocation_order_begin(*mf_);
}
- DEBUG(std::cerr << "\t\tregister with min weight: "
- << mri_->getName(minReg) << " (" << minWeight << ")\n");
+ DOUT << "\t\tregister with min weight: "
+ << mri_->getName(minReg) << " (" << minWeight << ")\n";
// if the current has the minimum weight, we need to spill it and
// add any added intervals back to unhandled, and restart
// linearscan.
- if (cur->weight != float(HUGE_VAL) && cur->weight <= minWeight) {
- DEBUG(std::cerr << "\t\t\tspilling(c): " << *cur << '\n';);
- int slot = vrm_->assignVirt2StackSlot(cur->reg);
+ if (cur->weight != HUGE_VALF && cur->weight <= minWeight) {
+ DOUT << "\t\t\tspilling(c): " << *cur << '\n';
+ // if the current interval is re-materializable, remember so and don't
+ // assign it a spill slot.
+ if (cur->remat)
+ vrm_->setVirtIsReMaterialized(cur->reg, cur->remat);
+ int slot = cur->remat ? vrm_->assignVirtReMatId(cur->reg)
+ : vrm_->assignVirt2StackSlot(cur->reg);
std::vector<LiveInterval*> added =
li_->addIntervalsForSpills(*cur, *vrm_, slot);
if (added.empty())
std::vector<LiveInterval*> added;
assert(MRegisterInfo::isPhysicalRegister(minReg) &&
"did not choose a register to spill?");
- std::vector<bool> toSpill(mri_->getNumRegs(), false);
+ BitVector toSpill(mri_->getNumRegs());
// We are going to spill minReg and all its aliases.
toSpill[minReg] = true;
if (//MRegisterInfo::isVirtualRegister(reg) &&
toSpill[vrm_->getPhys(reg)] &&
cur->overlapsFrom(*i->first, i->second)) {
- DEBUG(std::cerr << "\t\t\tspilling(a): " << *i->first << '\n');
+ DOUT << "\t\t\tspilling(a): " << *i->first << '\n';
earliestStart = std::min(earliestStart, i->first->beginNumber());
- int slot = vrm_->assignVirt2StackSlot(i->first->reg);
+ if (i->first->remat)
+ vrm_->setVirtIsReMaterialized(reg, i->first->remat);
+ int slot = i->first->remat ? vrm_->assignVirtReMatId(reg)
+ : vrm_->assignVirt2StackSlot(reg);
std::vector<LiveInterval*> newIs =
li_->addIntervalsForSpills(*i->first, *vrm_, slot);
std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
if (//MRegisterInfo::isVirtualRegister(reg) &&
toSpill[vrm_->getPhys(reg)] &&
cur->overlapsFrom(*i->first, i->second-1)) {
- DEBUG(std::cerr << "\t\t\tspilling(i): " << *i->first << '\n');
+ DOUT << "\t\t\tspilling(i): " << *i->first << '\n';
earliestStart = std::min(earliestStart, i->first->beginNumber());
- int slot = vrm_->assignVirt2StackSlot(reg);
+ if (i->first->remat)
+ vrm_->setVirtIsReMaterialized(reg, i->first->remat);
+ int slot = i->first->remat ? vrm_->assignVirtReMatId(reg)
+ : vrm_->assignVirt2StackSlot(reg);
std::vector<LiveInterval*> newIs =
li_->addIntervalsForSpills(*i->first, *vrm_, slot);
std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
}
}
- DEBUG(std::cerr << "\t\trolling back to: " << earliestStart << '\n');
+ DOUT << "\t\trolling back to: " << earliestStart << '\n';
// Scan handled in reverse order up to the earliest start of a
// spilled live interval and undo each one, restoring the state of
// If this interval starts before t we are done.
if (i->beginNumber() < earliestStart)
break;
- DEBUG(std::cerr << "\t\t\tundo changes for: " << *i << '\n');
+ DOUT << "\t\t\tundo changes for: " << *i << '\n';
handled_.pop_back();
// When undoing a live interval allocation we must know if it is active or
LiveInterval *HI = handled_[i];
if (!HI->expiredAt(earliestStart) &&
HI->expiredAt(cur->beginNumber())) {
- DEBUG(std::cerr << "\t\t\tundo changes for: " << *HI << '\n');
+ DOUT << "\t\t\tundo changes for: " << *HI << '\n';
active_.push_back(std::make_pair(HI, HI->begin()));
assert(!MRegisterInfo::isPhysicalRegister(HI->reg));
prt_->addRegUse(vrm_->getPhys(HI->reg));
}
}
- const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
-
unsigned FreeReg = 0;
unsigned FreeRegInactiveCount = 0;
-
+
+ // If copy coalescer has assigned a "preferred" register, check if it's
+ // available first.
+ if (cur->preference)
+ if (prt_->isRegAvail(cur->preference)) {
+ DOUT << "\t\tassigned the preferred register: "
+ << mri_->getName(cur->preference) << "\n";
+ return cur->preference;
+ } else
+ DOUT << "\t\tunable to assign the preferred register: "
+ << mri_->getName(cur->preference) << "\n";
+
// Scan for the first available register.
- TargetRegisterClass::iterator I = rc->allocation_order_begin(*mf_);
- TargetRegisterClass::iterator E = rc->allocation_order_end(*mf_);
+ TargetRegisterClass::iterator I = RC->allocation_order_begin(*mf_);
+ TargetRegisterClass::iterator E = RC->allocation_order_end(*mf_);
for (; I != E; ++I)
if (prt_->isRegAvail(*I)) {
FreeReg = *I;
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