Fix up instruction classes for Thumb2 RSB instructions to be consistent with

[oota-llvm.git] / lib / CodeGen / RegAllocLocal.cpp

diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 63725598248bf6a9aa10ffd66b7ee4a6ca70f701..321ae12def5710554a64c8b1efcd55a600f78c69 100644 (file)
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -37,6 +37,7 @@ using namespace llvm;
 
 STATISTIC(NumStores, "Number of stores added");
 STATISTIC(NumLoads , "Number of loads added");
+STATISTIC(NumCopies, "Number of copies coalesced");
 
 static RegisterRegAlloc
   localRegAlloc("local", "local register allocator",
@@ -300,6 +301,16 @@ void RALocal::storeVirtReg(MachineBasicBlock &MBB,
   DEBUG(dbgs() << " to stack slot #" << FrameIndex);
   TII->storeRegToStackSlot(MBB, I, PhysReg, isKill, FrameIndex, RC, TRI);
   ++NumStores;   // Update statistics
+
+  // Mark the spill instruction as last use if we're not killing the register.
+  if (!isKill) {
+    MachineInstr *Spill = llvm::prior(I);
+    int OpNum = Spill->findRegisterUseOperandIdx(PhysReg);
+    if (OpNum < 0)
+      getVirtRegLastUse(VirtReg) = std::make_pair((MachineInstr*)0, 0);
+    else
+      getVirtRegLastUse(VirtReg) = std::make_pair(Spill, OpNum);
+  }
 }
 
 /// spillVirtReg - This method spills the value specified by PhysReg into the
@@ -1156,8 +1167,10 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
     if (TII->isMoveInstr(*MI, SrcCopyReg, DstCopyReg,
                          SrcCopySubReg, DstCopySubReg) &&
         SrcCopyReg == DstCopyReg && SrcCopySubReg == DstCopySubReg &&
-        DeadDefs.empty())
+        DeadDefs.empty()) {
+      ++NumCopies;
       MBB.erase(MI);
+    }
   }
 
   MachineBasicBlock::iterator MI = MBB.getFirstTerminator();