No need to clear the map here, it will always be empty

[oota-llvm.git] / lib / CodeGen / RegAllocLocal.cpp

diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index b533bc878652606edbe8087e620bfa59d3d980c4..37d600ef81d33cb6a09f4e297b6adcf3a7b6c6aa 100644 (file)
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -23,14 +23,16 @@
 #include "llvm/Target/TargetMachine.h"
 #include "Support/CommandLine.h"
 #include "Support/Debug.h"
+#include "Support/DenseMap.h"
 #include "Support/Statistic.h"
 #include <iostream>
 using namespace llvm;
 
 namespace {
-  Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
-  Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
-  Statistic<> NumFused   ("ra-local", "Number of reloads fused into instructions");
+  Statistic<> NumStores("ra-local", "Number of stores added");
+  Statistic<> NumLoads ("ra-local", "Number of loads added");
+  Statistic<> NumFolded("ra-local", "Number of loads/stores folded into "
+                        "instructions");
   class RA : public MachineFunctionPass {
     const TargetMachine *TM;
     MachineFunction *MF;
@@ -42,19 +44,11 @@ namespace {
     std::map<unsigned, int> StackSlotForVirtReg;
 
     // Virt2PhysRegMap - This map contains entries for each virtual register
-    // that is currently available in a physical register.  This is "logically"
-    // a map from virtual register numbers to physical register numbers.
-    // Instead of using a map, however, which is slow, we use a vector.  The
-    // index is the VREG number - FirstVirtualRegister.  If the entry is zero,
-    // then it is logically "not in the map".
-    //
-    std::vector<unsigned> Virt2PhysRegMap;
+    // that is currently available in a physical register.
+    DenseMap<unsigned, VirtReg2IndexFunctor> Virt2PhysRegMap;
 
     unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
-      assert(MRegisterInfo::isVirtualRegister(VirtReg) &&"Illegal VREG #");
-      assert(VirtReg-MRegisterInfo::FirstVirtualRegister <Virt2PhysRegMap.size()
-             && "VirtReg not in map!");
-      return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];
+      return Virt2PhysRegMap[VirtReg];
     }
 
     // PhysRegsUsed - This array is effectively a map, containing entries for
@@ -159,7 +153,7 @@ namespace {
     /// the virtual register slot specified by VirtReg.  It then updates the RA
     /// data structures to indicate the fact that PhysReg is now available.
     ///
-    void spillVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
+    void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
                       unsigned VirtReg, unsigned PhysReg);
 
     /// spillPhysReg - This method spills the specified physical register into
@@ -257,7 +251,7 @@ void RA::removePhysReg(unsigned PhysReg) {
 /// virtual register slot specified by VirtReg.  It then updates the RA data
 /// structures to indicate the fact that PhysReg is now available.
 ///
-void RA::spillVirtReg(MachineBasicBlock &MBB, MachineInstr *I,
+void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
                       unsigned VirtReg, unsigned PhysReg) {
   assert(VirtReg && "Spilling a physical register is illegal!"
          " Must not have appropriate kill for the register or use exists beyond"
@@ -275,7 +269,7 @@ void RA::spillVirtReg(MachineBasicBlock &MBB, MachineInstr *I,
     int FrameIndex = getStackSpaceFor(VirtReg, RC);
     DEBUG(std::cerr << " to stack slot #" << FrameIndex);
     RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
-    ++NumSpilled;   // Update statistics
+    ++NumStores;   // Update statistics
   }
 
   getVirt2PhysRegMapSlot(VirtReg) = 0;   // VirtReg no longer available
@@ -495,7 +489,10 @@ MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
     // If we can fold this spill into this instruction, do so now.
     MachineBasicBlock::iterator MII = MI;
     if (RegInfo->foldMemoryOperand(MII, OpNum, FrameIndex)) {
-      ++NumFused;
+      ++NumFolded;
+      // Since we changed the address of MI, make sure to update live variables
+      // to know that the new instruction has the properties of the old one.
+      LV->instructionChanged(MI, MII);
       return MII;
     }
 
@@ -512,7 +509,7 @@ MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
 
   // Add move instruction(s)
   RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
-  ++NumReloaded;    // Update statistics
+  ++NumLoads;    // Update statistics
 
   MI->SetMachineOperandReg(OpNum, PhysReg);  // Assign the input register
   return MI;
@@ -645,11 +642,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
     }
   }
 
-  // Rewind the iterator to point to the first flow control instruction...
-  const TargetInstrInfo &TII = TM->getInstrInfo();
-  MI = MBB.end();
-  while (MI != MBB.begin() && TII.isTerminatorInstr((--MI)->getOpcode()));
-  ++MI;
+  MI = MBB.getFirstTerminator();
 
   // Spill all physical registers holding virtual registers now.
   for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
@@ -661,7 +654,8 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
 
 #ifndef NDEBUG
   bool AllOk = true;
-  for (unsigned i = 0, e = Virt2PhysRegMap.size(); i != e; ++i)
+  for (unsigned i = MRegisterInfo::FirstVirtualRegister,
+           e = MF->getSSARegMap()->getLastVirtReg(); i <= e; ++i)
     if (unsigned PR = Virt2PhysRegMap[i]) {
       std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
       AllOk = false;
@@ -689,7 +683,7 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) {
 
   // initialize the virtual->physical register map to have a 'null'
   // mapping for all virtual registers
-  Virt2PhysRegMap.assign(MF->getSSARegMap()->getNumVirtualRegs(), 0);
+  Virt2PhysRegMap.grow(MF->getSSARegMap()->getLastVirtReg());
 
   // Loop over all of the basic blocks, eliminating virtual register references
   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();