Simplify hasNUsesOfValue and hasAnyUsesOfValue even more. This

[oota-llvm.git] / lib / CodeGen / RegAllocLocal.cpp

diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 7acf982bdf86ed06dc68d051357d92da440c8c9c..7f65f1b29eee4caa2dabee40c157bd190a3abe17 100644 (file)
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -239,6 +239,9 @@ namespace {
     MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
                                 unsigned OpNum);
 
+    /// ComputeLocalLiveness - Computes liveness of registers within a basic
+    /// block, setting the killed/dead flags as appropriate.
+    void ComputeLocalLiveness(MachineBasicBlock& MBB);
 
     void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
                        unsigned PhysReg);
@@ -291,8 +294,6 @@ void RALocal::spillVirtReg(MachineBasicBlock &MBB,
   DOUT << "  Spilling register " << TRI->getName(PhysReg)
        << " containing %reg" << VirtReg;
   
-  const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
-  
   if (!isVirtRegModified(VirtReg)) {
     DOUT << " which has not been modified, so no store necessary!";
     std::pair<MachineInstr*, unsigned> &LastUse = getVirtRegLastUse(VirtReg);
@@ -507,7 +508,6 @@ MachineInstr *RALocal::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
        << TRI->getName(PhysReg) << "\n";
 
   // Add move instruction(s)
-  const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
   TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
   ++NumLoads;    // Update statistics
 
@@ -561,35 +561,9 @@ static bool precedes(MachineBasicBlock::iterator A,
   return false;
 }
 
-void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
-  // loop over each instruction
-  MachineBasicBlock::iterator MII = MBB.begin();
-  const TargetInstrInfo &TII = *TM->getInstrInfo();
-  
-  DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
-        if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
-
-  // If this is the first basic block in the machine function, add live-in
-  // registers as active.
-  if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
-    for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
-         E = MBB.livein_end(); I != E; ++I) {
-      unsigned Reg = *I;
-      MF->getRegInfo().setPhysRegUsed(Reg);
-      PhysRegsUsed[Reg] = 0;            // It is free and reserved now
-      AddToPhysRegsUseOrder(Reg); 
-      for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
-           *AliasSet; ++AliasSet) {
-        if (PhysRegsUsed[*AliasSet] != -2) {
-          AddToPhysRegsUseOrder(*AliasSet); 
-          PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
-          MF->getRegInfo().setPhysRegUsed(*AliasSet);
-        }
-      }
-    }    
-  }
-  
-  
+/// ComputeLocalLiveness - Computes liveness of registers within a basic
+/// block, setting the killed/dead flags as appropriate.
+void RALocal::ComputeLocalLiveness(MachineBasicBlock& MBB) {
   MachineRegisterInfo& MRI = MBB.getParent()->getRegInfo();
   // Keep track of the most recently seen previous use or def of each reg, 
   // so that we can update them with dead/kill markers.
@@ -611,13 +585,22 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
       // Defs others than 2-addr redefs _do_ trigger flag changes:
       //   - A def followed by a def is dead
       //   - A use followed by a def is a kill
-      if (MO.isReg() && MO.getReg() && MO.isDef() && 
-         !I->isRegReDefinedByTwoAddr(MO.getReg())) {
+      if (MO.isReg() && MO.getReg() && MO.isDef()) {
         std::map<unsigned, std::pair<MachineInstr*, unsigned> >::iterator
           last = LastUseDef.find(MO.getReg());
         if (last != LastUseDef.end()) {
+          
+          // If this is a two address instr, then we don't mark the def
+          // as killing the use.
+          if (last->second.first == I) {
+            LastUseDef[MO.getReg()] = std::make_pair(I, i);
+            continue;
+          }
+            
+          
           MachineOperand& lastUD =
                       last->second.first->getOperand(last->second.second);
+          
           if (lastUD.isDef())
             lastUD.setIsDead(true);
           else if (lastUD.isUse())
@@ -679,6 +662,36 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
         MO.setIsDead(true);
     }
   }
+}
+
+void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
+  // loop over each instruction
+  MachineBasicBlock::iterator MII = MBB.begin();
+  
+  DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
+        if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
+
+  // If this is the first basic block in the machine function, add live-in
+  // registers as active.
+  if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
+    for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
+         E = MBB.livein_end(); I != E; ++I) {
+      unsigned Reg = *I;
+      MF->getRegInfo().setPhysRegUsed(Reg);
+      PhysRegsUsed[Reg] = 0;            // It is free and reserved now
+      AddToPhysRegsUseOrder(Reg); 
+      for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
+           *AliasSet; ++AliasSet) {
+        if (PhysRegsUsed[*AliasSet] != -2) {
+          AddToPhysRegsUseOrder(*AliasSet); 
+          PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
+          MF->getRegInfo().setPhysRegUsed(*AliasSet);
+        }
+      }
+    }    
+  }
+  
+  ComputeLocalLiveness(MBB);
   
   // Otherwise, sequentially allocate each instruction in the MBB.
   while (MII != MBB.end()) {
@@ -843,7 +856,7 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
         getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
         DOUT << "  Assigning " << TRI->getName(DestPhysReg)
              << " to %reg" << DestVirtReg << "\n";
-        MI->getOperand(i).setReg(DestPhysReg);  // Assign the output register
+        MO.setReg(DestPhysReg);  // Assign the output register
       }
     }
 
@@ -882,7 +895,7 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
     
     // Finally, if this is a noop copy instruction, zap it.
     unsigned SrcReg, DstReg;
-    if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
+    if (TII->isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
       MBB.erase(MI);
   }