MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
unsigned OpNum);
+ /// ComputeLocalLiveness - Computes liveness of registers within a basic
+ /// block, setting the killed/dead flags as appropriate.
+ void ComputeLocalLiveness(MachineBasicBlock& MBB);
void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
unsigned PhysReg);
/// to be held on the stack.
int RALocal::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
// Find the location Reg would belong...
- std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
+ std::map<unsigned, int>::iterator I = StackSlotForVirtReg.find(VirtReg);
- if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
+ if (I != StackSlotForVirtReg.end())
return I->second; // Already has space allocated?
// Allocate a new stack object for this spill location...
DOUT << " Spilling register " << TRI->getName(PhysReg)
<< " containing %reg" << VirtReg;
- const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
-
if (!isVirtRegModified(VirtReg)) {
DOUT << " which has not been modified, so no store necessary!";
std::pair<MachineInstr*, unsigned> &LastUse = getVirtRegLastUse(VirtReg);
<< TRI->getName(PhysReg) << "\n";
// Add move instruction(s)
- const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
TII->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
++NumLoads; // Update statistics
return false;
}
-void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
- // loop over each instruction
- MachineBasicBlock::iterator MII = MBB.begin();
- const TargetInstrInfo &TII = *TM->getInstrInfo();
-
- DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
- if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
-
- // If this is the first basic block in the machine function, add live-in
- // registers as active.
- if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
- for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
- E = MBB.livein_end(); I != E; ++I) {
- unsigned Reg = *I;
- MF->getRegInfo().setPhysRegUsed(Reg);
- PhysRegsUsed[Reg] = 0; // It is free and reserved now
- AddToPhysRegsUseOrder(Reg);
- for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
- *AliasSet; ++AliasSet) {
- if (PhysRegsUsed[*AliasSet] != -2) {
- AddToPhysRegsUseOrder(*AliasSet);
- PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
- MF->getRegInfo().setPhysRegUsed(*AliasSet);
- }
- }
- }
- }
-
-
+/// ComputeLocalLiveness - Computes liveness of registers within a basic
+/// block, setting the killed/dead flags as appropriate.
+void RALocal::ComputeLocalLiveness(MachineBasicBlock& MBB) {
MachineRegisterInfo& MRI = MBB.getParent()->getRegInfo();
// Keep track of the most recently seen previous use or def of each reg,
// so that we can update them with dead/kill markers.
MO.setIsDead(true);
}
}
+}
+
+void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
+ // loop over each instruction
+ MachineBasicBlock::iterator MII = MBB.begin();
+
+ DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
+ if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
+
+ // If this is the first basic block in the machine function, add live-in
+ // registers as active.
+ if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
+ for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
+ E = MBB.livein_end(); I != E; ++I) {
+ unsigned Reg = *I;
+ MF->getRegInfo().setPhysRegUsed(Reg);
+ PhysRegsUsed[Reg] = 0; // It is free and reserved now
+ AddToPhysRegsUseOrder(Reg);
+ for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
+ *AliasSet; ++AliasSet) {
+ if (PhysRegsUsed[*AliasSet] != -2) {
+ AddToPhysRegsUseOrder(*AliasSet);
+ PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
+ MF->getRegInfo().setPhysRegUsed(*AliasSet);
+ }
+ }
+ }
+ }
+
+ ComputeLocalLiveness(MBB);
// Otherwise, sequentially allocate each instruction in the MBB.
while (MII != MBB.end()) {
getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
DOUT << " Assigning " << TRI->getName(DestPhysReg)
<< " to %reg" << DestVirtReg << "\n";
- MI->getOperand(i).setReg(DestPhysReg); // Assign the output register
+ MO.setReg(DestPhysReg); // Assign the output register
}
}
// Finally, if this is a noop copy instruction, zap it.
unsigned SrcReg, DstReg;
- if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
+ if (TII->isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
MBB.erase(MI);
}