Update PPC readme. Remove things that are done or aren't ppc specific

[oota-llvm.git] / lib / CodeGen / RegAllocLocal.cpp

diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 68d5fd95eedbc200fa1738744d4587e58d2f5ce3..d3c3277cbbf35cbcc1fc0b63b6a4d1ad789dee18 100644 (file)
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -21,10 +21,11 @@
 #include "llvm/CodeGen/LiveVariables.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
-#include "Support/CommandLine.h"
-#include "Support/Debug.h"
-#include "Support/DenseMap.h"
-#include "Support/Statistic.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/Statistic.h"
+#include <algorithm>
 using namespace llvm;
 
 namespace {
@@ -37,6 +38,7 @@ namespace {
     MachineFunction *MF;
     const MRegisterInfo *RegInfo;
     LiveVariables *LV;
+    bool *PhysRegsEverUsed;
 
     // StackSlotForVirtReg - Maps virtual regs to the frame index where these
     // values are spilled.
@@ -225,7 +227,8 @@ int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
     return I->second;          // Already has space allocated?
 
   // Allocate a new stack object for this spill location...
-  int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
+  int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
+                                                       RC->getAlignment());
 
   // Assign the slot...
   StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
@@ -355,39 +358,6 @@ unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
 ///
 void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
                          unsigned PhysReg) {
-  // FIXME: This code checks to see if a register is available, but it really
-  // wants to know if a reg is available BEFORE the instruction executes.  If
-  // called after killed operands are freed, it runs the risk of reallocating a
-  // used operand...
-#if 0
-  if (isPhysRegAvailable(PhysReg)) return;  // Already available...
-
-  // Check to see if the register is directly used, not indirectly used through
-  // aliases.  If aliased registers are the ones actually used, we cannot be
-  // sure that we will be able to save the whole thing if we do a reg-reg copy.
-  if (PhysRegsUsed[PhysReg] != -1) {
-    // The virtual register held...
-    unsigned VirtReg = PhysRegsUsed[PhysReg]->second;
-
-    // Check to see if there is a compatible register available.  If so, we can
-    // move the value into the new register...
-    //
-    const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
-    if (unsigned NewReg = getFreeReg(RC)) {
-      // Emit the code to copy the value...
-      RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
-
-      // Update our internal state to indicate that PhysReg is available and Reg
-      // isn't.
-      getVirt2PhysRegMapSlot[VirtReg] = 0;
-      removePhysReg(PhysReg);  // Free the physreg
-
-      // Move reference over to new register...
-      assignVirtToPhysReg(VirtReg, NewReg);
-      return;
-    }
-  }
-#endif
   spillPhysReg(MBB, I, PhysReg);
 }
 
@@ -423,7 +393,7 @@ unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
              "PhysReg in PhysRegsUseOrder, but is not allocated?");
       if (PhysRegsUsed[R]) {
         // If the current register is compatible, use it.
-        if (RegInfo->getRegClass(R) == RC) {
+        if (RC->contains(R)) {
           PhysReg = R;
           break;
         } else {
@@ -431,7 +401,7 @@ unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
           // compatible, use it.
           for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
                *AliasSet; ++AliasSet) {
-            if (RegInfo->getRegClass(*AliasSet) == RC) {
+            if (RC->contains(*AliasSet)) {
               PhysReg = *AliasSet;    // Take an aliased register
               break;
             }
@@ -509,6 +479,7 @@ MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
   RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex);
   ++NumLoads;    // Update statistics
 
+  PhysRegsEverUsed[PhysReg] = true;
   MI->SetMachineOperandReg(OpNum, PhysReg);  // Assign the input register
   return MI;
 }
@@ -578,6 +549,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
       if (MO.isDef() && MO.isRegister() && MO.getReg() &&
           MRegisterInfo::isPhysicalRegister(MO.getReg())) {
         unsigned Reg = MO.getReg();
+        PhysRegsEverUsed[Reg] = true;
         spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg
         PhysRegsUsed[Reg] = 0;            // It is free and reserved now
         PhysRegsUseOrder.push_back(Reg);
@@ -585,6 +557,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
              *AliasSet; ++AliasSet) {
           PhysRegsUseOrder.push_back(*AliasSet);
           PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
+          PhysRegsEverUsed[*AliasSet] = true;
         }
       }
     }
@@ -596,16 +569,19 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
       spillPhysReg(MBB, MI, Reg, true);
       PhysRegsUseOrder.push_back(Reg);
       PhysRegsUsed[Reg] = 0;            // It is free and reserved now
+      PhysRegsEverUsed[Reg] = true;
+
       for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
            *AliasSet; ++AliasSet) {
         PhysRegsUseOrder.push_back(*AliasSet);
         PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
+        PhysRegsEverUsed[*AliasSet] = true;
       }
     }
 
     // Okay, we have allocated all of the source operands and spilled any values
     // that would be destroyed by defs of this instruction.  Loop over the
-    // implicit defs and assign them to a register, spilling incoming values if
+    // explicit defs and assign them to a register, spilling incoming values if
     // we need to scavenge a register.
     //
     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
@@ -618,6 +594,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
         // If DestVirtReg already has a value, use it.
         if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
           DestPhysReg = getReg(MBB, MI, DestVirtReg);
+        PhysRegsEverUsed[DestPhysReg] = true;
         markVirtRegModified(DestVirtReg);
         MI->SetMachineOperandReg(i, DestPhysReg);  // Assign the output register
       }
@@ -683,6 +660,10 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) {
   RegInfo = TM->getRegisterInfo();
   LV = &getAnalysis<LiveVariables>();
 
+  PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
+  std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
+  Fn.setUsedPhysRegs(PhysRegsEverUsed);
+
   PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
 
   // initialize the virtual->physical register map to have a 'null'