Remove the ObjC ARC passes from the default optimization list, and add

[oota-llvm.git] / lib / CodeGen / RegAllocPBQP.cpp

diff --git a/lib/CodeGen/RegAllocPBQP.cpp b/lib/CodeGen/RegAllocPBQP.cpp
index 690732166b28db53762d9a126a51f72f9d507fad..72230d4b0c5cd52f911c3d76afba84b04d4f8d92 100644 (file)
--- a/lib/CodeGen/RegAllocPBQP.cpp
+++ b/lib/CodeGen/RegAllocPBQP.cpp
@@ -35,6 +35,7 @@
 #include "Splitter.h"
 #include "VirtRegMap.h"
 #include "VirtRegRewriter.h"
+#include "RegisterCoalescer.h"
 #include "llvm/CodeGen/CalcSpillWeights.h"
 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
 #include "llvm/CodeGen/LiveStackAnalysis.h"
@@ -46,7 +47,6 @@
 #include "llvm/CodeGen/PBQP/Graph.h"
 #include "llvm/CodeGen/PBQP/Heuristics/Briggs.h"
 #include "llvm/CodeGen/RegAllocRegistry.h"
-#include "llvm/CodeGen/RegisterCoalescer.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetInstrInfo.h"
@@ -84,7 +84,18 @@ public:
   static char ID;
 
   /// Construct a PBQP register allocator.
-  RegAllocPBQP(std::auto_ptr<PBQPBuilder> b) : MachineFunctionPass(ID), builder(b) {}
+  RegAllocPBQP(std::auto_ptr<PBQPBuilder> b, char *cPassID=0)
+      : MachineFunctionPass(ID), builder(b), customPassID(cPassID) {
+    initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
+    initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
+    initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
+    initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
+    initializeLiveStacksPass(*PassRegistry::getPassRegistry());
+    initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
+    initializeLoopSplitterPass(*PassRegistry::getPassRegistry());
+    initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
+    initializeRenderMachineFunctionPass(*PassRegistry::getPassRegistry());
+  }
 
   /// Return the pass name.
   virtual const char* getPassName() const {
@@ -111,6 +122,8 @@ private:
 
   std::auto_ptr<PBQPBuilder> builder;
 
+  char *customPassID;
+
   MachineFunction *mf;
   const TargetMachine *tm;
   const TargetRegisterInfo *tri;
@@ -211,10 +224,9 @@ std::auto_ptr<PBQPRAProblem> PBQPBuilder::build(MachineFunction *mf,
     // Compute an initial allowed set for the current vreg.
     typedef std::vector<unsigned> VRAllowed;
     VRAllowed vrAllowed;
-    for (TargetRegisterClass::iterator aoItr = trc->allocation_order_begin(*mf),
-                                       aoEnd = trc->allocation_order_end(*mf);
-         aoItr != aoEnd; ++aoItr) {
-      unsigned preg = *aoItr;
+    ArrayRef<unsigned> rawOrder = trc->getRawAllocationOrder(*mf);
+    for (unsigned i = 0; i != rawOrder.size(); ++i) {
+      unsigned preg = rawOrder[i];
       if (!reservedRegs.test(preg)) {
         vrAllowed.push_back(preg);
       }
@@ -227,11 +239,13 @@ std::auto_ptr<PBQPRAProblem> PBQPBuilder::build(MachineFunction *mf,
       unsigned preg = *pregItr;
       const LiveInterval *pregLI = &lis->getInterval(preg);
 
-      if (pregLI->empty())
+      if (pregLI->empty()) {
         continue;
+      }
 
-      if (!vregLI->overlaps(*pregLI))
+      if (!vregLI->overlaps(*pregLI)) {
         continue;
+      }
 
       // Remove the register from the allowed set.
       VRAllowed::iterator eraseItr =
@@ -307,10 +321,10 @@ void PBQPBuilder::addInterferenceCosts(
   assert(costMat.getRows() == vr1Allowed.size() + 1 && "Matrix height mismatch.");
   assert(costMat.getCols() == vr2Allowed.size() + 1 && "Matrix width mismatch.");
 
-  for (unsigned i = 0; i < vr1Allowed.size(); ++i) {
+  for (unsigned i = 0; i != vr1Allowed.size(); ++i) {
     unsigned preg1 = vr1Allowed[i];
 
-    for (unsigned j = 0; j < vr2Allowed.size(); ++j) {
+    for (unsigned j = 0; j != vr2Allowed.size(); ++j) {
       unsigned preg2 = vr2Allowed[j];
 
       if (tri->regsOverlap(preg1, preg2)) {
@@ -344,11 +358,13 @@ std::auto_ptr<PBQPRAProblem> PBQPBuilderWithCoalescing::build(
          miItr != miEnd; ++miItr) {
       const MachineInstr *mi = &*miItr;
 
-      if (!cp.setRegisters(mi))
+      if (!cp.setRegisters(mi)) {
         continue; // Not coalescable.
+      }
 
-      if (cp.getSrcReg() == cp.getDstReg())
+      if (cp.getSrcReg() == cp.getDstReg()) {
         continue; // Already coalesced.
+      }
 
       unsigned dst = cp.getDstReg(),
                src = cp.getSrcReg();
@@ -361,13 +377,15 @@ std::auto_ptr<PBQPRAProblem> PBQPBuilderWithCoalescing::build(
                                                    loopInfo->getLoopDepth(mbb));
 
       if (cp.isPhys()) {
-        if (!lis->isAllocatable(dst))
+        if (!lis->isAllocatable(dst)) {
           continue;
+        }
 
         const PBQPRAProblem::AllowedSet &allowed = p->getAllowedSet(src);
         unsigned pregOpt = 0;  
-        while (pregOpt < allowed.size() && allowed[pregOpt] != dst)
+        while (pregOpt < allowed.size() && allowed[pregOpt] != dst) {
           ++pregOpt;
+        }
         if (pregOpt < allowed.size()) {
           ++pregOpt; // +1 to account for spill option.
           PBQP::Graph::NodeItr node = p->getNodeForVReg(src);
@@ -414,9 +432,9 @@ void PBQPBuilderWithCoalescing::addVirtRegCoalesce(
   assert(costMat.getRows() == vr1Allowed.size() + 1 && "Size mismatch.");
   assert(costMat.getCols() == vr2Allowed.size() + 1 && "Size mismatch.");
 
-  for (unsigned i = 0; i < vr1Allowed.size(); ++i) {
+  for (unsigned i = 0; i != vr1Allowed.size(); ++i) {
     unsigned preg1 = vr1Allowed[i];
-    for (unsigned j = 0; j < vr2Allowed.size(); ++j) {
+    for (unsigned j = 0; j != vr2Allowed.size(); ++j) {
       unsigned preg2 = vr2Allowed[j];
 
       if (preg1 == preg2) {
@@ -433,6 +451,8 @@ void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const {
   au.addRequired<LiveIntervals>();
   //au.addRequiredID(SplitCriticalEdgesID);
   au.addRequired<RegisterCoalescer>();
+  if (customPassID)
+    au.addRequiredID(*customPassID);
   au.addRequired<CalculateSpillWeights>();
   au.addRequired<LiveStacks>();
   au.addPreserved<LiveStacks>();
@@ -462,8 +482,7 @@ void RegAllocPBQP::findVRegIntervalsToAlloc() {
     // finalizeAlloc.
     if (!li->empty()) {
       vregsToAlloc.insert(li->reg);
-    }
-    else {
+    } else {
       emptyIntervalVRegs.insert(li->reg);
     }
   }
@@ -473,18 +492,20 @@ void RegAllocPBQP::addStackInterval(const LiveInterval *spilled,
                                     MachineRegisterInfo* mri) {
   int stackSlot = vrm->getStackSlot(spilled->reg);
 
-  if (stackSlot == VirtRegMap::NO_STACK_SLOT)
+  if (stackSlot == VirtRegMap::NO_STACK_SLOT) {
     return;
+  }
 
   const TargetRegisterClass *RC = mri->getRegClass(spilled->reg);
   LiveInterval &stackInterval = lss->getOrCreateInterval(stackSlot, RC);
 
   VNInfo *vni;
-  if (stackInterval.getNumValNums() != 0)
+  if (stackInterval.getNumValNums() != 0) {
     vni = stackInterval.getValNumInfo(0);
-  else
+  } else {
     vni = stackInterval.getNextValue(
       SlotIndex(), 0, lss->getVNInfoAllocator());
+  }
 
   LiveInterval &rhsInterval = lis->getInterval(spilled->reg);
   stackInterval.MergeRangesInAsValue(rhsInterval, vni);
@@ -516,10 +537,9 @@ bool RegAllocPBQP::mapPBQPToRegAlloc(const PBQPRAProblem &problem,
       vregsToAlloc.erase(vreg);
       const LiveInterval* spillInterval = &lis->getInterval(vreg);
       double oldWeight = spillInterval->weight;
-      SmallVector<LiveInterval*, 8> spillIs;
       rmf->rememberUseDefs(spillInterval);
       std::vector<LiveInterval*> newSpills =
-        lis->addIntervalsForSpills(*spillInterval, spillIs, loopInfo, *vrm);
+        lis->addIntervalsForSpills(*spillInterval, 0, loopInfo, *vrm);
       addStackInterval(spillInterval, mri);
       rmf->rememberSpills(spillInterval, newSpills);
 
@@ -564,7 +584,7 @@ void RegAllocPBQP::finalizeAlloc() const {
 
     if (physReg == 0) {
       const TargetRegisterClass *liRC = mri->getRegClass(li->reg);
-      physReg = *liRC->allocation_order_begin(*mf);
+      physReg = liRC->getRawAllocationOrder(*mf).front();
     }
 
     vrm->assignVirt2Phys(li->reg, physReg);
@@ -583,11 +603,9 @@ void RegAllocPBQP::finalizeAlloc() const {
     // Get the physical register for this interval
     if (TargetRegisterInfo::isPhysicalRegister(li->reg)) {
       reg = li->reg;
-    }
-    else if (vrm->isAssignedReg(li->reg)) {
+    } else if (vrm->isAssignedReg(li->reg)) {
       reg = vrm->getPhys(li->reg);
-    }
-    else {
+    } else {
       // Ranges which are assigned a stack slot only are ignored.
       continue;
     }
@@ -604,7 +622,7 @@ void RegAllocPBQP::finalizeAlloc() const {
       // Find the set of basic blocks which this range is live into...
       if (lis->findLiveInMBBs(lrItr->start, lrItr->end,  liveInMBBs)) {
         // And add the physreg for this interval to their live-in sets.
-        for (unsigned i = 0; i < liveInMBBs.size(); ++i) {
+        for (unsigned i = 0; i != liveInMBBs.size(); ++i) {
           if (liveInMBBs[i] != entryMBB) {
             if (!liveInMBBs[i]->isLiveIn(reg)) {
               liveInMBBs[i]->addLiveIn(reg);
@@ -688,8 +706,9 @@ bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) {
 }
 
 FunctionPass* llvm::createPBQPRegisterAllocator(
-                                           std::auto_ptr<PBQPBuilder> builder) {
-  return new RegAllocPBQP(builder);
+                                           std::auto_ptr<PBQPBuilder> builder,
+                                           char *customPassID) {
+  return new RegAllocPBQP(builder, customPassID);
 }
 
 FunctionPass* llvm::createDefaultPBQPRegisterAllocator() {