#include "PBQP.h"
#include "VirtRegMap.h"
-#include "Spiller.h"
+#include "VirtRegRewriter.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/LiveStackAnalysis.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
//! \brief Adds a stack interval if the given live interval has been
//! spilled. Used to support stack slot coloring.
- void addStackInterval(const LiveInterval *spilled, float &weight);
+ void addStackInterval(const LiveInterval *spilled,MachineRegisterInfo* mri);
//! \brief Given a solved PBQP problem maps this solution back to a register
//! assignment.
return solver;
}
-void PBQPRegAlloc::addStackInterval(const LiveInterval *spilled, float &weight) {
+void PBQPRegAlloc::addStackInterval(const LiveInterval *spilled,
+ MachineRegisterInfo* mri) {
int stackSlot = vrm->getStackSlot(spilled->reg);
if (stackSlot == VirtRegMap::NO_STACK_SLOT)
return;
- LiveInterval &stackInterval = lss->getOrCreateInterval(stackSlot);
- stackInterval.weight += weight;
+ const TargetRegisterClass *RC = mri->getRegClass(spilled->reg);
+ LiveInterval &stackInterval = lss->getOrCreateInterval(stackSlot, RC);
VNInfo *vni;
if (stackInterval.getNumValNums() != 0)
vni = stackInterval.getValNumInfo(0);
else
- vni = stackInterval.getNextValue(-0U, 0, lss->getVNInfoAllocator());
+ vni = stackInterval.getNextValue(0, 0, false, lss->getVNInfoAllocator());
LiveInterval &rhsInterval = lis->getInterval(spilled->reg);
stackInterval.MergeRangesInAsValue(rhsInterval, vni);
// of allocation
vregIntervalsToAlloc.erase(&lis->getInterval(virtReg));
- float ssWeight;
-
// Insert spill ranges for this live range
const LiveInterval *spillInterval = node2LI[node];
double oldSpillWeight = spillInterval->weight;
SmallVector<LiveInterval*, 8> spillIs;
std::vector<LiveInterval*> newSpills =
- lis->addIntervalsForSpills(*spillInterval, spillIs, loopInfo, *vrm,
- ssWeight);
- addStackInterval(spillInterval, ssWeight);
+ lis->addIntervalsForSpills(*spillInterval, spillIs, loopInfo, *vrm);
+ addStackInterval(spillInterval, mri);
DOUT << "VREG " << virtReg << " -> SPILLED (Cost: "
<< oldSpillWeight << ", New vregs: ";
// First allocate registers for the empty intervals.
for (LiveIntervalSet::const_iterator
- itr = emptyVRegIntervals.begin(), end = emptyVRegIntervals.end();
+ itr = emptyVRegIntervals.begin(), end = emptyVRegIntervals.end();
itr != end; ++itr) {
LiveInterval *li = *itr;
- unsigned physReg = li->preference;
-
+ unsigned physReg = vrm->getRegAllocPref(li->reg);
if (physReg == 0) {
const TargetRegisterClass *liRC = mri->getRegClass(li->reg);
physReg = *liRC->allocation_order_begin(*mf);
continue;
}
+ // Ignore unallocated vregs:
+ if (reg == 0) {
+ continue;
+ }
+
// Iterate over the ranges of the current interval...
for (LRIterator lrItr = li->begin(), lrEnd = li->end();
lrItr != lrEnd; ++lrItr) {
DOUT << "Post alloc VirtRegMap:\n" << *vrm << "\n";
- // Run spiller
- std::auto_ptr<Spiller> spiller(createSpiller());
- spiller->runOnMachineFunction(*mf, *vrm, lis);
+ // Run rewriter
+ std::auto_ptr<VirtRegRewriter> rewriter(createVirtRegRewriter());
+
+ rewriter->runOnMachineFunction(*mf, *vrm, lis);
return true;
}