Fix SingleSource/Regression/C/2005-05-06-LongLongSignedShift.c, we were not

[oota-llvm.git] / lib / CodeGen / RegAllocSimple.cpp

diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index 1b7f5471b423e415471dd23167e31fe494f50623..00f3180a137a39e02aeed9184d1f014b7d8f3413 100644 (file)
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -22,10 +22,9 @@
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
-#include "Support/Debug.h"
-#include "Support/Statistic.h"
-#include "Support/STLExtras.h"
-#include <iostream>
+#include "llvm/Support/Debug.h"
+#include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/STLExtras.h"
 using namespace llvm;
 
 namespace {
@@ -36,6 +35,7 @@ namespace {
     MachineFunction *MF;
     const TargetMachine *TM;
     const MRegisterInfo *RegInfo;
+    bool *PhysRegsEverUsed;
     
     // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
     // these values are spilled
@@ -100,7 +100,8 @@ int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
     return I->second;          // Already has space allocated?
 
   // Allocate a new stack object for this spill location...
-  int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
+  int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
+                                                       RC->getAlignment());
   
   // Assign the slot...
   StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
@@ -118,8 +119,10 @@ unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
     assert(RI+regIdx != RE && "Not enough registers!");
     unsigned PhysReg = *(RI+regIdx);
     
-    if (!RegsUsed[PhysReg])
+    if (!RegsUsed[PhysReg]) {
+      PhysRegsEverUsed[PhysReg] = true;
       return PhysReg;
+    }
   }
 }
 
@@ -132,7 +135,7 @@ unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
 
   // Add move instruction(s)
   ++NumLoads;
-  RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
+  RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx);
   return PhysReg;
 }
 
@@ -144,7 +147,7 @@ void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
 
   // Add move instruction(s)
   ++NumStores;
-  RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIdx, RC);
+  RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIdx);
 }
 
 
@@ -156,19 +159,20 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
 
     RegsUsed.resize(RegInfo->getNumRegs());
     
-    // a preliminary pass that will invalidate any registers that
-    // are used by the instruction (including implicit uses)
+    // This is a preliminary pass that will invalidate any registers that are
+    // used by the instruction (including implicit uses).
     unsigned Opcode = MI->getOpcode();
-    const TargetInstrDescriptor &Desc = TM->getInstrInfo().get(Opcode);
-    const unsigned *Regs = Desc.ImplicitUses;
-    while (*Regs)
-      RegsUsed[*Regs++] = true;
+    const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode);
+    const unsigned *Regs;
+    for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
+      RegsUsed[*Regs] = true;
     
-    Regs = Desc.ImplicitDefs;
-    while (*Regs)
-      RegsUsed[*Regs++] = true;
+    for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
+      RegsUsed[*Regs] = true;
+      PhysRegsEverUsed[*Regs] = true;
+    }
     
-    // Loop over uses, move from memory into registers
+    // Loop over uses, move from memory into registers.
     for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
       MachineOperand &op = MI->getOperand(i);
       
@@ -177,14 +181,14 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
         unsigned virtualReg = (unsigned) op.getReg();
         DEBUG(std::cerr << "op: " << op << "\n");
         DEBUG(std::cerr << "\t inst[" << i << "]: ";
-              MI->print(std::cerr, *TM));
+              MI->print(std::cerr, TM));
         
         // make sure the same virtual register maps to the same physical
         // register in any given instruction
         unsigned physReg = Virt2PhysRegMap[virtualReg];
         if (physReg == 0) {
           if (op.isDef()) {
-            if (!TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) || i) {
+            if (!TM->getInstrInfo()->isTwoAddrInstr(MI->getOpcode()) || i) {
               physReg = getFreeReg(virtualReg);
             } else {
               // must be same register number as the first operand
@@ -225,6 +229,10 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
   TM = &MF->getTarget();
   RegInfo = TM->getRegisterInfo();
 
+  PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
+  std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
+  Fn.setUsedPhysRegs(PhysRegsEverUsed);
+
   // Loop over all of the basic blocks, eliminating virtual register references
   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
        MBB != MBBe; ++MBB)