Make the role of MVT::i32 clearer here, and add a

[oota-llvm.git] / lib / CodeGen / RegAllocSimple.cpp

diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index 33828235777345a2a15c867653477a868321bd3c..081edd8d5eb8b0a5f8b3b2c8bbe36e4b3687a44e 100644 (file)
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -27,6 +27,7 @@
 #include "llvm/Support/Compiler.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/STLExtras.h"
+#include <map>
 using namespace llvm;
 
 STATISTIC(NumStores, "Number of stores added");
@@ -44,7 +45,7 @@ namespace {
   private:
     MachineFunction *MF;
     const TargetMachine *TM;
-    const MRegisterInfo *MRI;
+    const TargetRegisterInfo *TRI;
 
     // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
     // these values are spilled
@@ -169,11 +170,11 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
     // Made to combat the incorrect allocation of r2 = add r1, r1
     std::map<unsigned, unsigned> Virt2PhysRegMap;
 
-    RegsUsed.resize(MRI->getNumRegs());
+    RegsUsed.resize(TRI->getNumRegs());
 
     // This is a preliminary pass that will invalidate any registers that are
     // used by the instruction (including implicit uses).
-    const TargetInstrDescriptor &Desc = *MI->getDesc();
+    const TargetInstrDesc &Desc = MI->getDesc();
     const unsigned *Regs;
     if (Desc.ImplicitUses) {
       for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
@@ -192,7 +193,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
       MachineOperand &op = MI->getOperand(i);
 
       if (op.isRegister() && op.getReg() &&
-          MRegisterInfo::isVirtualRegister(op.getReg())) {
+          TargetRegisterInfo::isVirtualRegister(op.getReg())) {
         unsigned virtualReg = (unsigned) op.getReg();
         DOUT << "op: " << op << "\n";
         DOUT << "\t inst[" << i << "]: ";
@@ -203,7 +204,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
         unsigned physReg = Virt2PhysRegMap[virtualReg];
         if (physReg == 0) {
           if (op.isDef()) {
-            int TiedOp = MI->getDesc()->findTiedToSrcOperand(i);
+            int TiedOp = Desc.findTiedToSrcOperand(i);
             if (TiedOp == -1) {
               physReg = getFreeReg(virtualReg);
             } else {
@@ -239,7 +240,7 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
   DOUT << "Machine Function\n";
   MF = &Fn;
   TM = &MF->getTarget();
-  MRI = TM->getRegisterInfo();
+  TRI = TM->getRegisterInfo();
 
   // Loop over all of the basic blocks, eliminating virtual register references
   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();