//===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
-//
+//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
+//
//===----------------------------------------------------------------------===//
//
// This file implements a simple register allocator. *Very* simple: It immediate
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
-#include "Support/Debug.h"
-#include "Support/Statistic.h"
-#include "Support/STLExtras.h"
-#include <iostream>
+#include "llvm/Support/Debug.h"
+#include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/STLExtras.h"
using namespace llvm;
namespace {
MachineFunction *MF;
const TargetMachine *TM;
const MRegisterInfo *RegInfo;
-
+ bool *PhysRegsEverUsed;
+
// StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
// these values are spilled
std::map<unsigned, int> StackSlotForVirtReg;
/// getStackSpaceFor - This allocates space for the specified virtual
/// register to be held on the stack.
int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
- const TargetRegisterClass *RC) {
+ const TargetRegisterClass *RC) {
// Find the location VirtReg would belong...
std::map<unsigned, int>::iterator I =
StackSlotForVirtReg.lower_bound(VirtReg);
return I->second; // Already has space allocated?
// Allocate a new stack object for this spill location...
- int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
-
+ int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
+ RC->getAlignment());
+
// Assign the slot...
StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
while (1) {
- unsigned regIdx = RegClassIdx[RC]++;
+ unsigned regIdx = RegClassIdx[RC]++;
assert(RI+regIdx != RE && "Not enough registers!");
unsigned PhysReg = *(RI+regIdx);
-
- if (!RegsUsed[PhysReg])
+
+ if (!RegsUsed[PhysReg]) {
+ PhysRegsEverUsed[PhysReg] = true;
return PhysReg;
+ }
}
}
std::map<unsigned, unsigned> Virt2PhysRegMap;
RegsUsed.resize(RegInfo->getNumRegs());
-
- // a preliminary pass that will invalidate any registers that
- // are used by the instruction (including implicit uses)
+
+ // This is a preliminary pass that will invalidate any registers that are
+ // used by the instruction (including implicit uses).
unsigned Opcode = MI->getOpcode();
const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode);
- const unsigned *Regs = Desc.ImplicitUses;
- while (*Regs)
- RegsUsed[*Regs++] = true;
-
- Regs = Desc.ImplicitDefs;
- while (*Regs)
- RegsUsed[*Regs++] = true;
-
- // Loop over uses, move from memory into registers
+ const unsigned *Regs;
+ for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
+ RegsUsed[*Regs] = true;
+
+ for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
+ RegsUsed[*Regs] = true;
+ PhysRegsEverUsed[*Regs] = true;
+ }
+
+ // Loop over uses, move from memory into registers.
for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
MachineOperand &op = MI->getOperand(i);
-
+
if (op.isRegister() && op.getReg() &&
MRegisterInfo::isVirtualRegister(op.getReg())) {
unsigned virtualReg = (unsigned) op.getReg();
DEBUG(std::cerr << "op: " << op << "\n");
DEBUG(std::cerr << "\t inst[" << i << "]: ";
MI->print(std::cerr, TM));
-
+
// make sure the same virtual register maps to the same physical
// register in any given instruction
unsigned physReg = Virt2PhysRegMap[virtualReg];
}
}
MI->SetMachineOperandReg(i, physReg);
- DEBUG(std::cerr << "virt: " << virtualReg <<
+ DEBUG(std::cerr << "virt: " << virtualReg <<
", phys: " << op.getReg() << "\n");
}
}
TM = &MF->getTarget();
RegInfo = TM->getRegisterInfo();
+ PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
+ std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
+ Fn.setUsedPhysRegs(PhysRegsEverUsed);
+
// Loop over all of the basic blocks, eliminating virtual register references
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
MBB != MBBe; ++MBB)