Fix problems linking against the reoptimizer; _llvm_regAllocState must have

[oota-llvm.git] / lib / CodeGen / RegAllocSimple.cpp

diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index 104d042de09dbed7b435d581ef2d1305f14d84a1..a210790b8dd77f0313d02be7fae97e4c9ac01c23 100644 (file)
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -1,4 +1,11 @@
 //===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
 //
 // This file implements a simple register allocator. *Very* simple: It immediate
 // spills every value right after it is computed, and it reloads all used
@@ -7,13 +14,15 @@
 //
 //===----------------------------------------------------------------------===//
 
+#define DEBUG_TYPE "regalloc"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
+#include "Support/Debug.h"
 #include "Support/Statistic.h"
 #include <iostream>
 
@@ -56,7 +65,7 @@ namespace {
     void AllocateBasicBlock(MachineBasicBlock &MBB);
 
     /// getStackSpaceFor - This returns the offset of the specified virtual
-    /// register on the stack, allocating space if neccesary.
+    /// register on the stack, allocating space if necessary.
     int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
 
     /// Given a virtual register, return a compatible physical register that is
@@ -150,14 +159,14 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
     // a preliminary pass that will invalidate any registers that
     // are used by the instruction (including implicit uses)
     unsigned Opcode = MI->getOpcode();
-    const MachineInstrDescriptor &Desc = TM->getInstrInfo().get(Opcode);
-    if (const unsigned *Regs = Desc.ImplicitUses)
-      while (*Regs)
-       RegsUsed[*Regs++] = true;
+    const TargetInstrDescriptor &Desc = TM->getInstrInfo().get(Opcode);
+    const unsigned *Regs = Desc.ImplicitUses;
+    while (*Regs)
+      RegsUsed[*Regs++] = true;
     
-    if (const unsigned *Regs = Desc.ImplicitDefs)
-      while (*Regs)
-       RegsUsed[*Regs++] = true;
+    Regs = Desc.ImplicitDefs;
+    while (*Regs)
+      RegsUsed[*Regs++] = true;
     
     // Loop over uses, move from memory into registers
     for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
@@ -173,7 +182,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
         // register in any given instruction
         unsigned physReg = Virt2PhysRegMap[virtualReg];
         if (physReg == 0) {
-          if (op.opIsDef()) {
+          if (op.opIsDefOnly() || op.opIsDefAndUse()) {
             if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
               // must be same register number as the first operand
               // This maps a = b + c into b += c, and saves b into a's spot
@@ -222,6 +231,6 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
   return true;
 }
 
-Pass *createSimpleRegisterAllocator() {
+FunctionPass *createSimpleRegisterAllocator() {
   return new RegAllocSimple();
 }