/// trivial computation, replace the copy by rematerialize the definition.
/// If PreserveSrcInt is true, make sure SrcInt is valid after the call.
bool ReMaterializeTrivialDef(LiveInterval &SrcInt, bool PreserveSrcInt,
- unsigned DstReg, unsigned DstSubIdx,
- MachineInstr *CopyMI);
+ unsigned DstReg, MachineInstr *CopyMI);
/// shouldJoinPhys - Return true if a physreg copy should be joined.
bool shouldJoinPhys(CoalescerPair &CP);
return false;
const TargetRegisterClass *SrcRC = MRI.getRegClass(Src);
const TargetRegisterClass *DstRC = MRI.getRegClass(Dst);
- if (!getCommonSubClass(DstRC, SrcRC))
+ if (!TRI.getCommonSubClass(DstRC, SrcRC))
return false;
SrcSub = DstSub = 0;
}
if (DstSub)
NewRC = TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSub);
else
- NewRC = getCommonSubClass(DstRC, SrcRC);
+ NewRC = TRI.getCommonSubClass(DstRC, SrcRC);
if (!NewRC)
return false;
CrossClass = NewRC != DstRC || NewRC != SrcRC;
}
/// HasOtherReachingDefs - Return true if there are definitions of IntB
-/// other than BValNo val# that can reach uses of AValno val# of IntA, or any
-/// of its phis.
+/// other than BValNo val# that can reach uses of AValno val# of IntA.
bool RegisterCoalescer::HasOtherReachingDefs(LiveInterval &IntA,
- LiveInterval &IntB,
- VNInfo *AValNo,
- VNInfo *BValNo) {
+ LiveInterval &IntB,
+ VNInfo *AValNo,
+ VNInfo *BValNo) {
for (LiveInterval::iterator AI = IntA.begin(), AE = IntA.end();
AI != AE; ++AI) {
- if (AI->valno != AValNo && !AI->valno->isPHIDef())
- continue;
+ if (AI->valno != AValNo) continue;
LiveInterval::Ranges::iterator BI =
std::upper_bound(IntB.ranges.begin(), IntB.ranges.end(), AI->start);
if (BI != IntB.ranges.begin())
VNInfo *AValNo = IntA.getVNInfoAt(CopyIdx.getUseIndex());
assert(AValNo && "COPY source not live");
- if (AValNo->isPHIDef() || AValNo->isUnused())
+ // If other defs can reach uses of this def, then it's not safe to perform
+ // the optimization.
+ if (AValNo->isPHIDef() || AValNo->isUnused() || AValNo->hasPHIKill())
return false;
MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def);
if (!DefMI)
bool RegisterCoalescer::ReMaterializeTrivialDef(LiveInterval &SrcInt,
bool preserveSrcInt,
unsigned DstReg,
- unsigned DstSubIdx,
MachineInstr *CopyMI) {
SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getUseIndex();
LiveInterval::iterator SrcLR = SrcInt.FindLiveRangeContaining(CopyIdx);
return false;
}
- // If destination register has a sub-register index on it, make sure it
- // matches the instruction register class.
- if (DstSubIdx) {
- const MCInstrDesc &MCID = DefMI->getDesc();
- if (MCID.getNumDefs() != 1)
- return false;
- const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg);
- const TargetRegisterClass *DstSubRC =
- DstRC->getSubRegisterRegClass(DstSubIdx);
- const TargetRegisterClass *DefRC = TII->getRegClass(MCID, 0, TRI);
- if (DefRC == DstRC)
- DstSubIdx = 0;
- else if (DefRC != DstSubRC)
- return false;
- }
-
RemoveCopyFlag(DstReg, CopyMI);
MachineBasicBlock *MBB = CopyMI->getParent();
MachineBasicBlock::iterator MII =
llvm::next(MachineBasicBlock::iterator(CopyMI));
- TII->reMaterialize(*MBB, MII, DstReg, DstSubIdx, DefMI, *TRI);
+ TII->reMaterialize(*MBB, MII, DstReg, 0, DefMI, *TRI);
MachineInstr *NewMI = prior(MII);
// CopyMI may have implicit operands, transfer them over to the newly
UseMI->getOperand(0).getReg() != DstReg &&
!JoinedCopies.count(UseMI) &&
ReMaterializeTrivialDef(LIS->getInterval(SrcReg), false,
- UseMI->getOperand(0).getReg(), 0, UseMI))
+ UseMI->getOperand(0).getReg(), UseMI))
continue;
}
Kills |= MO.isKill();
Deads |= MO.isDead();
+ // Make sure we don't create read-modify-write defs accidentally. We
+ // assume here that a SrcReg def cannot be joined into a live DstReg. If
+ // RegisterCoalescer starts tracking partially live registers, we will
+ // need to check the actual LiveInterval to determine if DstReg is live
+ // here.
+ if (SubIdx && !Reads)
+ MO.setIsUndef();
+
if (DstIsPhys)
MO.substPhysReg(DstReg, *TRI);
else
// trivial computation, try rematerializing it.
if (!CP.isFlipped() &&
ReMaterializeTrivialDef(LIS->getInterval(CP.getSrcReg()), true,
- CP.getDstReg(), 0, CopyMI))
+ CP.getDstReg(), CopyMI))
return true;
return false;
}
// rematerializing it.
if (!CP.isFlipped() &&
ReMaterializeTrivialDef(LIS->getInterval(CP.getSrcReg()), true,
- CP.getDstReg(), 0, CopyMI))
+ CP.getDstReg(), CopyMI))
return true;
// If we can eliminate the copy without merging the live ranges, do so now.