#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/STLExtras.h"
using namespace llvm;
MachineInstr *MI = MBBI;
DistanceMap.insert(std::make_pair(MI, CurrDist++));
- const TargetInstrDesc &TID = MI->getDesc();
if (MI == ScavengeRestore) {
ScavengedReg = 0;
}
// Process uses first.
- BitVector UseRegs(NumPhysRegs);
+ BitVector KillRegs(NumPhysRegs);
for (unsigned i = 0, e = UseMOs.size(); i != e; ++i) {
const MachineOperand MO = *UseMOs[i].first;
unsigned Reg = MO.getReg();
assert(isUsed(Reg) && "Using an undefined register!");
- if (MO.isKill() && !isReserved(Reg)) {
- UseRegs.set(Reg);
+ // Kill of implicit_def defined registers are ignored. e.g.
+ // entry: 0x2029ab8, LLVM BB @0x1b06080, ID#0:
+ // Live Ins: %R0
+ // %R0<def> = IMPLICIT_DEF
+ // %R0<def> = IMPLICIT_DEF
+ // STR %R0<kill>, %R0, %reg0, 0, 14, %reg0, Mem:ST(4,4) [0x1b06510 + 0]
+ // %R1<def> = LDR %R0, %reg0, 24, 14, %reg0, Mem:LD(4,4) [0x1b065bc + 0]
+ if (MO.isKill() && !isReserved(Reg) && !isImplicitlyDefined(Reg)) {
+ KillRegs.set(Reg);
// Mark sub-registers as used.
for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
unsigned SubReg = *SubRegs; ++SubRegs)
- UseRegs.set(SubReg);
+ KillRegs.set(SubReg);
}
}
// Change states of all registers after all the uses are processed to guard
// against multiple uses.
- setUnused(UseRegs);
+ setUnused(KillRegs);
// Process early clobber defs then process defs. We can have a early clobber
// that is dead, it should not conflict with a def that happens one "slot"
}
// Skip two-address destination operand.
- if (TID.findTiedToSrcOperand(Idx) != -1) {
+ if (MI->isRegTiedToUseOperand(Idx)) {
assert(isUsed(Reg) && "Using an undefined register!");
continue;
}
MachineInstr *MI = MBBI;
DistanceMap.erase(MI);
--CurrDist;
- const TargetInstrDesc &TID = MI->getDesc();
// Separate register operands into 3 classes: uses, defs, earlyclobbers.
SmallVector<std::pair<const MachineOperand*,unsigned>, 4> UseMOs;
? DefMOs[i].second : EarlyClobberMOs[i-NumDefs].second;
// Skip two-address destination operand.
- if (TID.findTiedToSrcOperand(Idx) != -1)
+ if (MI->isRegTiedToUseOperand(Idx))
continue;
unsigned Reg = MO.getReg();