Use the new PriorityQueue in ScheduleDAGList too, which also

[oota-llvm.git] / lib / CodeGen / RegisterScavenging.cpp

diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp
index 1d9effb11085a76c1a9dc0de72d6dbec3b15b404..e8329781ac3d7cca5c4b43ec9ac73c9b1db5d439 100644 (file)
--- a/lib/CodeGen/RegisterScavenging.cpp
+++ b/lib/CodeGen/RegisterScavenging.cpp
@@ -37,11 +37,12 @@ static bool RedefinesSuperRegPart(const MachineInstr *MI, unsigned SubReg,
     const MachineOperand &MO = MI->getOperand(i);
     if (!MO.isRegister())
       continue;
-    if (TRI->isSuperRegister(SubReg, MO.getReg()))
+    if (TRI->isSuperRegister(SubReg, MO.getReg())) {
       if (MO.isUse())
         SeenSuperUse = true;
       else if (MO.isImplicit())
         SeenSuperDef = true;
+    }
   }
 
   return SeenSuperDef && SeenSuperUse;