More constification of things. More comments added. No functionality

[oota-llvm.git] / lib / CodeGen / SelectionDAG / CallingConvLower.cpp

diff --git a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
index 08a6ade62480cbd2746b077fa38c5c600d7eb675..591e9aa0eecb30261cc52d5d2b492925d163bfd1 100644 (file)
--- a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
+++ b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by Chris Lattner and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -14,25 +14,46 @@
 
 #include "llvm/CodeGen/CallingConvLower.h"
 #include "llvm/CodeGen/SelectionDAGNodes.h"
-#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetMachine.h"
 using namespace llvm;
 
-CCState::CCState(unsigned CC, const TargetMachine &tm,
+CCState::CCState(unsigned CC, bool isVarArg, const TargetMachine &tm,
                  SmallVector<CCValAssign, 16> &locs)
-  : CallingConv(CC), TM(tm), MRI(*TM.getRegisterInfo()), Locs(locs) {
+  : CallingConv(CC), IsVarArg(isVarArg), TM(tm),
+    TRI(*TM.getRegisterInfo()), Locs(locs) {
   // No stack is used.
   StackOffset = 0;
   
-  UsedRegs.resize(MRI.getNumRegs());
+  UsedRegs.resize(TRI.getNumRegs());
 }
 
+// HandleByVal - Allocate a stack slot large enough to pass an argument by
+// value. The size and alignment information of the argument is encoded in its
+// parameter attribute.
+void CCState::HandleByVal(unsigned ValNo, MVT::ValueType ValVT,
+                          MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,
+                          int MinSize, int MinAlign,
+                          unsigned ArgFlags) {
+  unsigned Align  = 1 << ((ArgFlags & ISD::ParamFlags::ByValAlign) >>
+                          ISD::ParamFlags::ByValAlignOffs);
+  unsigned Size   = (ArgFlags & ISD::ParamFlags::ByValSize) >>
+      ISD::ParamFlags::ByValSizeOffs;
+  if (MinSize > (int)Size)
+    Size = MinSize;
+  if (MinAlign > (int)Align)
+    Align = MinAlign;
+  unsigned Offset = AllocateStack(Size, Align);
+
+  addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
+}
 
 /// MarkAllocated - Mark a register and all of its aliases as allocated.
 void CCState::MarkAllocated(unsigned Reg) {
   UsedRegs[Reg/32] |= 1 << (Reg&31);
   
-  if (const unsigned *RegAliases = MRI.getAliasSet(Reg))
+  if (const unsigned *RegAliases = TRI.getAliasSet(Reg))
     for (; (Reg = *RegAliases); ++RegAliases)
       UsedRegs[Reg/32] |= 1 << (Reg&31);
 }
@@ -98,4 +119,3 @@ void CCState::AnalyzeCallResult(SDNode *TheCall, CCAssignFn Fn) {
     }
   }
 }
-