More constification of things. More comments added. No functionality

[oota-llvm.git] / lib / CodeGen / SelectionDAG / DAGCombiner.cpp

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 0823e0a71c1c3bebca2c9565cfe28ebeffd85bae..026666c45fc7af4ef8789a323edd432a6028db6d 100644 (file)
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -137,6 +137,7 @@ namespace {
     //   otherwise            - N should be replaced by the returned Operand.
     //
     SDOperand visitTokenFactor(SDNode *N);
+    SDOperand visitMERGE_VALUES(SDNode *N);
     SDOperand visitADD(SDNode *N);
     SDOperand visitSUB(SDNode *N);
     SDOperand visitADDC(SDNode *N);
@@ -264,7 +265,6 @@ public:
   WorkListRemover(DAGCombiner &dc) : DC(dc) {}
   
   virtual void NodeDeleted(SDNode *N) {
-    printf("remove from WL: %p\n", (void*)N);
     DC.removeFromWorkList(N);
   }
   
@@ -663,6 +663,7 @@ SDOperand DAGCombiner::visit(SDNode *N) {
   switch(N->getOpcode()) {
   default: break;
   case ISD::TokenFactor:        return visitTokenFactor(N);
+  case ISD::MERGE_VALUES:       return visitMERGE_VALUES(N);
   case ISD::ADD:                return visitADD(N);
   case ISD::SUB:                return visitSUB(N);
   case ISD::ADDC:               return visitADDC(N);
@@ -838,6 +839,18 @@ SDOperand DAGCombiner::visitTokenFactor(SDNode *N) {
   return Result;
 }
 
+/// MERGE_VALUES can always be eliminated.
+SDOperand DAGCombiner::visitMERGE_VALUES(SDNode *N) {
+  WorkListRemover DeadNodes(*this);
+  for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
+    DAG.ReplaceAllUsesOfValueWith(SDOperand(N, i), N->getOperand(i),
+                                  &DeadNodes);
+  removeFromWorkList(N);
+  DAG.DeleteNode(N);
+  return SDOperand(N, 0);   // Return N so it doesn't get rechecked!
+}
+
+
 static
 SDOperand combineShlAddConstant(SDOperand N0, SDOperand N1, SelectionDAG &DAG) {
   MVT::ValueType VT = N0.getValueType();
@@ -924,7 +937,7 @@ SDOperand DAGCombiner::visitADD(SDNode *N) {
     return N1;
   // fold (add c1, c2) -> c1+c2
   if (N0C && N1C)
-    return DAG.getNode(ISD::ADD, VT, N0, N1);
+    return DAG.getConstant(N0C->getValue() + N1C->getValue(), VT);
   // canonicalize constant to RHS
   if (N0C && !N1C)
     return DAG.getNode(ISD::ADD, VT, N1, N0);
@@ -1740,7 +1753,7 @@ SDOperand DAGCombiner::visitAND(SDNode *N) {
         unsigned PtrOff = LVTStoreBytes - EVTStoreBytes;
         unsigned Alignment = LN0->getAlignment();
         SDOperand NewPtr = LN0->getBasePtr();
-        if (!TLI.isLittleEndian()) {
+        if (TLI.isBigEndian()) {
           NewPtr = DAG.getNode(ISD::ADD, PtrType, NewPtr,
                                DAG.getConstant(PtrOff, PtrType));
           Alignment = MinAlign(Alignment, PtrOff);
@@ -3087,7 +3100,7 @@ SDOperand DAGCombiner::ReduceLoadWidth(SDNode *N) {
     MVT::ValueType PtrType = N0.getOperand(1).getValueType();
     // For big endian targets, we need to adjust the offset to the pointer to
     // load the correct bytes.
-    if (!TLI.isLittleEndian()) {
+    if (TLI.isBigEndian()) {
       unsigned LVTStoreBits = MVT::getStoreSizeInBits(N0.getValueType());
       unsigned EVTStoreBits = MVT::getStoreSizeInBits(EVT);
       ShAmt = LVTStoreBits - EVTStoreBits - ShAmt;
@@ -3437,14 +3450,16 @@ ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *BV, MVT::ValueType DstEltVT) {
         Ops.push_back(DAG.getConstant(NewBits, DstEltVT));
     }
 
-    MVT::ValueType VT = MVT::getVectorType(DstEltVT,
-                                           Ops.size());
+    MVT::ValueType VT = MVT::getVectorType(DstEltVT, Ops.size()); 
     return DAG.getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
   }
   
   // Finally, this must be the case where we are shrinking elements: each input
   // turns into multiple outputs.
+  bool isS2V = ISD::isScalarToVector(BV);
   unsigned NumOutputsPerInput = SrcBitSize/DstBitSize;
+  MVT::ValueType VT = MVT::getVectorType(DstEltVT,
+                                     NumOutputsPerInput * BV->getNumOperands());
   SmallVector<SDOperand, 8> Ops;
   for (unsigned i = 0, e = BV->getNumOperands(); i != e; ++i) {
     if (BV->getOperand(i).getOpcode() == ISD::UNDEF) {
@@ -3453,18 +3468,19 @@ ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *BV, MVT::ValueType DstEltVT) {
       continue;
     }
     uint64_t OpVal = cast<ConstantSDNode>(BV->getOperand(i))->getValue();
-
     for (unsigned j = 0; j != NumOutputsPerInput; ++j) {
       unsigned ThisVal = OpVal & ((1ULL << DstBitSize)-1);
-      OpVal >>= DstBitSize;
       Ops.push_back(DAG.getConstant(ThisVal, DstEltVT));
+      if (isS2V && i == 0 && j == 0 && ThisVal == OpVal)
+        // Simply turn this into a SCALAR_TO_VECTOR of the new type.
+        return DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Ops[0]);
+      OpVal >>= DstBitSize;
     }
 
     // For big endian targets, swap the order of the pieces of each element.
-    if (!TLI.isLittleEndian())
+    if (TLI.isBigEndian())
       std::reverse(Ops.end()-NumOutputsPerInput, Ops.end());
   }
-  MVT::ValueType VT = MVT::getVectorType(DstEltVT, Ops.size());
   return DAG.getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
 }
 
@@ -4387,7 +4403,7 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) {
           uint64_t Val = CFP->getValueAPF().convertToAPInt().getZExtValue();
           SDOperand Lo = DAG.getConstant(Val & 0xFFFFFFFF, MVT::i32);
           SDOperand Hi = DAG.getConstant(Val >> 32, MVT::i32);
-          if (!TLI.isLittleEndian()) std::swap(Lo, Hi);
+          if (TLI.isBigEndian()) std::swap(Lo, Hi);
 
           int SVOffset = ST->getSrcValueOffset();
           unsigned Alignment = ST->getAlignment();