//
// The LLVM Compiler Infrastructure
//
-// This file was developed by Nate Begeman and is distributed under the
-// University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
/// it can be simplified or if things it uses can be simplified by bit
/// propagation. If so, return true.
bool SimplifyDemandedBits(SDOperand Op, uint64_t Demanded = ~0ULL) {
- TargetLowering::TargetLoweringOpt TLO(DAG);
+ TargetLowering::TargetLoweringOpt TLO(DAG, AfterLegalize);
uint64_t KnownZero, KnownOne;
Demanded &= MVT::getIntVTBitMask(Op.getValueType());
if (!TLI.SimplifyDemandedBits(Op, Demanded, KnownZero, KnownOne, TLO))
TLI.isOperationLegal(LoOpt.getOpcode(), LoOpt.getValueType())) {
RetVal = true;
DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0), LoOpt);
- }
+ } else
+ DAG.DeleteNode(Lo.Val);
}
if (HiExists) {
TLI.isOperationLegal(HiOpt.getOpcode(), HiOpt.getValueType())) {
RetVal = true;
DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 1), HiOpt);
- }
+ } else
+ DAG.DeleteNode(Hi.Val);
}
return RetVal;
MVT::ValueType VT = N->getValueType(0);
MVT::ValueType VT0 = N0.getValueType();
-
- // Some targets have SETCC types bigger than 1 bit, but do not set all the
- // bits to 1; identified by getSetCCResultContents. Watch out for these.
-
// fold select C, X, X -> X
if (N1 == N2)
return N1;
return DAG.getNode(ISD::TRUNCATE, VT, XORNode);
}
// fold select C, 0, X -> ~C & X
- if (VT == VT0 && N1C && N1C->isNullValue() &&
- (N0.Val->getOpcode()!=ISD::SETCC || VT==MVT::i1 ||
- TLI.getSetCCResultContents()==
- TargetLowering::ZeroOrNegativeOneSetCCResult)) {
- SDOperand XORNode;
- XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(~0UL, VT));
+ if (VT == VT0 && VT == MVT::i1 && N1C && N1C->isNullValue()) {
+ SDOperand XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT));
AddToWorkList(XORNode.Val);
return DAG.getNode(ISD::AND, VT, XORNode, N2);
}
// fold select C, X, 1 -> ~C | X
- if (VT == VT0 && N2C && N2C->getValue() == 1 &&
- (N0.Val->getOpcode()!=ISD::SETCC || VT==MVT::i1 ||
- TLI.getSetCCResultContents()==
- TargetLowering::ZeroOrNegativeOneSetCCResult)) {
- SDOperand XORNode;
- XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(~0UL, VT));
+ if (VT == VT0 && VT == MVT::i1 && N2C && N2C->getValue() == 1) {
+ SDOperand XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT));
AddToWorkList(XORNode.Val);
return DAG.getNode(ISD::OR, VT, XORNode, N1);
}
ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
MVT::ValueType VT = N->getValueType(0);
+ // If this is fp_round(fpextend), don't fold it, allow ourselves to be folded.
+ if (N->hasOneUse() && (*N->use_begin())->getOpcode() == ISD::FP_ROUND)
+ return SDOperand();
+
// fold (fp_extend c1fp) -> c1fp
if (N0CFP && VT != MVT::ppcf128)
return DAG.getNode(ISD::FP_EXTEND, VT, N0);
if (CombineToPreIndexedLoadStore(N) || CombineToPostIndexedLoadStore(N))
return SDOperand(N, 0);
- // FIXME: is there such a think as a truncating indexed store?
+ // FIXME: is there such a thing as a truncating indexed store?
if (ST->isTruncatingStore() && ST->getAddressingMode() == ISD::UNINDEXED &&
MVT::isInteger(Value.getValueType())) {
// See if we can simplify the input to this truncstore with knowledge that
return SDOperand(N, 0);
}
+ // If this is a load followed by a store to the same location, then the store
+ // is dead/noop.
+ if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(Value)) {
+ if (Chain.Val == Ld && Ld->getBasePtr() == Ptr &&
+ ST->getAddressingMode() == ISD::UNINDEXED &&
+ ST->getStoredVT() == Ld->getLoadedVT() &&
+ !ST->isVolatile()) {
+ // The store is dead, remove it.
+ return Chain;
+ }
+ }
+
return SDOperand();
}