#include "llvm/CallingConv.h"
#include "llvm/Constants.h"
#include <iostream>
-#include <set>
+#include <map>
using namespace llvm;
//===----------------------------------------------------------------------===//
void LegalizeSetCCOperands(SDOperand &LHS, SDOperand &RHS, SDOperand &CC);
+ SDOperand CreateStackTemporary(MVT::ValueType VT);
+
SDOperand ExpandLibCall(const char *Name, SDNode *Node,
SDOperand &Hi);
SDOperand ExpandIntToFP(bool isSigned, MVT::ValueType DestTy,
SDOperand Source);
SDOperand ExpandBIT_CONVERT(MVT::ValueType DestVT, SDOperand SrcOp);
+ SDOperand ExpandBUILD_VECTOR(SDNode *Node);
SDOperand ExpandLegalINT_TO_FP(bool isSigned,
SDOperand LegalOp,
MVT::ValueType DestVT);
// Otherwise, this is a multiple element vector that isn't supported.
// Split it in half and legalize both parts.
SDOperand X, Y;
- ExpandOp(Op, X, Y);
+ SplitVectorOp(Op, X, Y);
}
}
break;
case ISD::TargetFrameIndex:
case ISD::TargetConstant:
case ISD::TargetConstantFP:
- case ISD::TargetConstantVec:
case ISD::TargetConstantPool:
case ISD::TargetGlobalAddress:
case ISD::TargetExternalSymbol:
}
break;
}
+
+ case ISD::INTRINSIC_W_CHAIN:
+ case ISD::INTRINSIC_WO_CHAIN:
+ case ISD::INTRINSIC_VOID: {
+ std::vector<SDOperand> Ops;
+ for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i)
+ Ops.push_back(LegalizeOp(Node->getOperand(i)));
+ Result = DAG.UpdateNodeOperands(Result, Ops);
+
+ // Allow the target to custom lower its intrinsics if it wants to.
+ if (TLI.getOperationAction(Node->getOpcode(), MVT::Other) ==
+ TargetLowering::Custom) {
+ Tmp3 = TLI.LowerOperation(Result, DAG);
+ if (Tmp3.Val) Result = Tmp3;
+ }
+
+ if (Result.Val->getNumValues() == 1) break;
+
+ // Must have return value and chain result.
+ assert(Result.Val->getNumValues() == 2 &&
+ "Cannot return more than two values!");
+
+ // Since loads produce two values, make sure to remember that we
+ // legalized both of them.
+ AddLegalizedOperand(SDOperand(Node, 0), Result.getValue(0));
+ AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
+ return Result.getValue(Op.ResNo);
+ }
case ISD::LOCATION:
assert(Node->getNumOperands() == 5 && "Invalid LOCATION node!");
}
break;
}
- case ISD::ConstantVec:
- switch (TLI.getOperationAction(ISD::ConstantVec, Node->getValueType(0))) {
- default: assert(0 && "This action is not supported yet!");
- case TargetLowering::Custom:
- Tmp3 = TLI.LowerOperation(Result, DAG);
- if (Tmp3.Val) {
- Result = Tmp3;
- break;
- }
- // FALLTHROUGH
- case TargetLowering::Expand:
- // We assume that vector constants are not legal, and will be immediately
- // spilled to the constant pool.
- //
- // Create a ConstantPacked, and put it in the constant pool.
- MVT::ValueType VT = Node->getValueType(0);
- const Type *OpNTy =
- MVT::getTypeForValueType(Node->getOperand(0).getValueType());
- std::vector<Constant*> CV;
- if (MVT::isFloatingPoint(VT)) {
- for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
- double V = cast<ConstantFPSDNode>(Node->getOperand(i))->getValue();
- CV.push_back(ConstantFP::get(OpNTy, V));
- }
- } else {
- for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
- uint64_t V = cast<ConstantSDNode>(Node->getOperand(i))->getValue();
- CV.push_back(ConstantUInt::get(OpNTy, V));
- }
- }
- Constant *CP = ConstantPacked::get(CV);
- SDOperand CPIdx = DAG.getConstantPool(CP, TLI.getPointerTy());
- Result = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
- DAG.getSrcValue(NULL));
- break;
- }
- break;
case ISD::TokenFactor:
if (Node->getNumOperands() == 2) {
Tmp1 = LegalizeOp(Node->getOperand(0));
}
break;
+ case ISD::BUILD_VECTOR:
+ switch (TLI.getOperationAction(ISD::BUILD_VECTOR, Node->getValueType(0))) {
+ default: assert(0 && "This action is not supported yet!");
+ case TargetLowering::Custom:
+ Tmp3 = TLI.LowerOperation(Result, DAG);
+ if (Tmp3.Val) {
+ Result = Tmp3;
+ break;
+ }
+ // FALLTHROUGH
+ case TargetLowering::Expand:
+ Result = ExpandBUILD_VECTOR(Result.Val);
+ break;
+ }
+ break;
+ case ISD::INSERT_VECTOR_ELT:
+ Tmp1 = LegalizeOp(Node->getOperand(0)); // InVec
+ Tmp2 = LegalizeOp(Node->getOperand(1)); // InVal
+ Tmp3 = LegalizeOp(Node->getOperand(2)); // InEltNo
+ Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3);
+
+ switch (TLI.getOperationAction(ISD::INSERT_VECTOR_ELT,
+ Node->getValueType(0))) {
+ default: assert(0 && "This action is not supported yet!");
+ case TargetLowering::Legal:
+ break;
+ case TargetLowering::Custom:
+ Tmp3 = TLI.LowerOperation(Result, DAG);
+ if (Tmp3.Val) {
+ Result = Tmp3;
+ break;
+ }
+ // FALLTHROUGH
+ case TargetLowering::Expand: {
+ // If the target doesn't support this, we have to spill the input vector
+ // to a temporary stack slot, update the element, then reload it. This is
+ // badness. We could also load the value into a vector register (either
+ // with a "move to register" or "extload into register" instruction, then
+ // permute it into place, if the idx is a constant and if the idx is
+ // supported by the target.
+ SDOperand StackPtr = CreateStackTemporary(Tmp1.getValueType());
+ // Store the vector.
+ SDOperand Ch = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
+ Tmp1, StackPtr, DAG.getSrcValue(NULL));
+
+ // Truncate or zero extend offset to target pointer type.
+ MVT::ValueType IntPtr = TLI.getPointerTy();
+ if (Tmp3.getValueType() > IntPtr)
+ Tmp3 = DAG.getNode(ISD::TRUNCATE, IntPtr, Tmp3);
+ else
+ Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, IntPtr, Tmp3);
+
+ // Add the offset to the index.
+ unsigned EltSize = MVT::getSizeInBits(Result.getValueType())/8;
+ Tmp3 = DAG.getNode(ISD::MUL, Tmp3.getValueType(), Tmp3,
+ DAG.getConstant(EltSize, Tmp3.getValueType()));
+ SDOperand StackPtr2 =
+ DAG.getNode(ISD::ADD, Tmp3.getValueType(), Tmp3, StackPtr);
+ // Store the scalar value.
+ Ch = DAG.getNode(ISD::STORE, MVT::Other, Ch,
+ Tmp2, StackPtr2, DAG.getSrcValue(NULL));
+ // Load the updated vector.
+ Result = DAG.getLoad(Result.getValueType(), Ch, StackPtr,
+ DAG.getSrcValue(NULL));
+ break;
+ }
+ }
+ break;
+ case ISD::SCALAR_TO_VECTOR:
+ Tmp1 = LegalizeOp(Node->getOperand(0)); // InVal
+ Result = DAG.UpdateNodeOperands(Result, Tmp1);
+ switch (TLI.getOperationAction(ISD::SCALAR_TO_VECTOR,
+ Node->getValueType(0))) {
+ default: assert(0 && "This action is not supported yet!");
+ case TargetLowering::Legal:
+ break;
+ case TargetLowering::Custom:
+ Tmp3 = TLI.LowerOperation(Result, DAG);
+ if (Tmp3.Val) {
+ Result = Tmp3;
+ break;
+ }
+ // FALLTHROUGH
+ case TargetLowering::Expand: {
+ // If the target doesn't support this, store the value to a temporary
+ // stack slot, then EXTLOAD the vector back out.
+ // TODO: If a target doesn't support this, create a stack slot for the
+ // whole vector, then store into it, then load the whole vector.
+ SDOperand StackPtr =
+ CreateStackTemporary(Node->getOperand(0).getValueType());
+ SDOperand Ch = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
+ Node->getOperand(0), StackPtr,
+ DAG.getSrcValue(NULL));
+ Result = DAG.getExtLoad(ISD::EXTLOAD, Node->getValueType(0), Ch, StackPtr,
+ DAG.getSrcValue(NULL),
+ Node->getOperand(0).getValueType());
+ break;
+ }
+ }
+ break;
+ case ISD::VECTOR_SHUFFLE:
+ assert(TLI.isShuffleLegal(Result.getValueType(), Node->getOperand(2)) &&
+ "vector shuffle should not be created if not legal!");
+ Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the input vectors,
+ Tmp2 = LegalizeOp(Node->getOperand(1)); // but not the shuffle mask.
+ Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2));
+
+ // Allow targets to custom lower the SHUFFLEs they support.
+ if (TLI.getOperationAction(ISD::VECTOR_SHUFFLE, Result.getValueType())
+ == TargetLowering::Custom) {
+ Tmp1 = TLI.LowerOperation(Result, DAG);
+ if (Tmp1.Val) Result = Tmp1;
+ }
+ break;
+
+ case ISD::EXTRACT_VECTOR_ELT:
+ Tmp1 = LegalizeOp(Node->getOperand(0));
+ Tmp2 = LegalizeOp(Node->getOperand(1));
+ Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2);
+
+ switch (TLI.getOperationAction(ISD::EXTRACT_VECTOR_ELT,
+ Tmp1.getValueType())) {
+ default: assert(0 && "This action is not supported yet!");
+ case TargetLowering::Legal:
+ break;
+ case TargetLowering::Custom:
+ Tmp3 = TLI.LowerOperation(Result, DAG);
+ if (Tmp3.Val) {
+ Result = Tmp3;
+ break;
+ }
+ // FALLTHROUGH
+ case TargetLowering::Expand: {
+ // If the target doesn't support this, store the value to a temporary
+ // stack slot, then LOAD the scalar element back out.
+ SDOperand StackPtr = CreateStackTemporary(Tmp1.getValueType());
+ SDOperand Ch = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
+ Tmp1, StackPtr, DAG.getSrcValue(NULL));
+
+ // Add the offset to the index.
+ unsigned EltSize = MVT::getSizeInBits(Result.getValueType())/8;
+ Tmp2 = DAG.getNode(ISD::MUL, Tmp2.getValueType(), Tmp2,
+ DAG.getConstant(EltSize, Tmp2.getValueType()));
+ StackPtr = DAG.getNode(ISD::ADD, Tmp2.getValueType(), Tmp2, StackPtr);
+
+ Result = DAG.getLoad(Result.getValueType(), Ch, StackPtr,
+ DAG.getSrcValue(NULL));
+ break;
+ }
+ }
+ break;
+
+ case ISD::VEXTRACT_VECTOR_ELT: {
+ // We know that operand #0 is the Vec vector. If the index is a constant
+ // or if the invec is a supported hardware type, we can use it. Otherwise,
+ // lower to a store then an indexed load.
+ Tmp1 = Node->getOperand(0);
+ Tmp2 = LegalizeOp(Node->getOperand(1));
+
+ SDNode *InVal = Tmp1.Val;
+ unsigned NumElems = cast<ConstantSDNode>(*(InVal->op_end()-2))->getValue();
+ MVT::ValueType EVT = cast<VTSDNode>(*(InVal->op_end()-1))->getVT();
+
+ // Figure out if there is a Packed type corresponding to this Vector
+ // type. If so, convert to the packed type.
+ MVT::ValueType TVT = MVT::getVectorType(EVT, NumElems);
+ if (TVT != MVT::Other && TLI.isTypeLegal(TVT)) {
+ // Turn this into a packed extract_vector_elt operation.
+ Tmp1 = PackVectorOp(Tmp1, TVT);
+ Result = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, Node->getValueType(0),
+ Tmp1, Tmp2);
+ break;
+ } else if (NumElems == 1) {
+ // This must be an access of the only element.
+ Result = PackVectorOp(Tmp1, EVT);
+ break;
+ } else if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Tmp2)) {
+ SDOperand Lo, Hi;
+ SplitVectorOp(Tmp1, Lo, Hi);
+ if (CIdx->getValue() < NumElems/2) {
+ Tmp1 = Lo;
+ } else {
+ Tmp1 = Hi;
+ Tmp2 = DAG.getConstant(CIdx->getValue() - NumElems/2,
+ Tmp2.getValueType());
+ }
+
+ // It's now an extract from the appropriate high or low part.
+ Result = LegalizeOp(DAG.UpdateNodeOperands(Result, Tmp1, Tmp2));
+ } else {
+ // FIXME: IMPLEMENT STORE/LOAD lowering. Need alignment of stack slot!!
+ assert(0 && "unimp!");
+ }
+ break;
+ }
+
case ISD::CALLSEQ_START: {
SDNode *CallEnd = FindCallEndFromCallStart(Node);
}
}
break;
+ case ISD::VBIT_CONVERT: {
+ assert(Op.getOperand(0).getValueType() == MVT::Vector &&
+ "Can only have VBIT_CONVERT where input or output is MVT::Vector!");
+
+ // The input has to be a vector type, we have to either scalarize it, pack
+ // it, or convert it based on whether the input vector type is legal.
+ SDNode *InVal = Node->getOperand(0).Val;
+ unsigned NumElems =
+ cast<ConstantSDNode>(*(InVal->op_end()-2))->getValue();
+ MVT::ValueType EVT = cast<VTSDNode>(*(InVal->op_end()-1))->getVT();
+
+ // Figure out if there is a Packed type corresponding to this Vector
+ // type. If so, convert to the packed type.
+ MVT::ValueType TVT = MVT::getVectorType(EVT, NumElems);
+ if (TVT != MVT::Other && TLI.isTypeLegal(TVT)) {
+ // Turn this into a bit convert of the packed input.
+ Result = DAG.getNode(ISD::BIT_CONVERT, Node->getValueType(0),
+ PackVectorOp(Node->getOperand(0), TVT));
+ break;
+ } else if (NumElems == 1) {
+ // Turn this into a bit convert of the scalar input.
+ Result = DAG.getNode(ISD::BIT_CONVERT, Node->getValueType(0),
+ PackVectorOp(Node->getOperand(0), EVT));
+ break;
+ } else {
+ // FIXME: UNIMP! Store then reload
+ assert(0 && "Cast from unsupported vector type not implemented yet!");
+ }
+ }
+
// Conversion operators. The source and destination have different types.
case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP: {
SDOperand SelectionDAGLegalize::ExpandBIT_CONVERT(MVT::ValueType DestVT,
SDOperand SrcOp) {
// Create the stack frame object.
- MachineFrameInfo *FrameInfo = DAG.getMachineFunction().getFrameInfo();
- unsigned ByteSize = MVT::getSizeInBits(DestVT)/8;
- int FrameIdx = FrameInfo->CreateStackObject(ByteSize, ByteSize);
- SDOperand FIPtr = DAG.getFrameIndex(FrameIdx, TLI.getPointerTy());
+ SDOperand FIPtr = CreateStackTemporary(DestVT);
// Emit a store to the stack slot.
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
return DAG.getLoad(DestVT, Store, FIPtr, DAG.getSrcValue(0));
}
+/// ExpandBUILD_VECTOR - Expand a BUILD_VECTOR node on targets that don't
+/// support the operation, but do support the resultant packed vector type.
+SDOperand SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) {
+
+ // If the only non-undef value is the low element, turn this into a
+ // SCALAR_TO_VECTOR node. If this is { X, X, X, X }, determine X.
+ unsigned NumElems = Node->getNumOperands();
+ bool isOnlyLowElement = true;
+ SDOperand SplatValue = Node->getOperand(0);
+ std::map<SDOperand, std::vector<unsigned> > Values;
+ Values[SplatValue].push_back(0);
+ bool isConstant = true;
+ if (!isa<ConstantFPSDNode>(SplatValue) && !isa<ConstantSDNode>(SplatValue) &&
+ SplatValue.getOpcode() != ISD::UNDEF)
+ isConstant = false;
+
+ for (unsigned i = 1; i < NumElems; ++i) {
+ SDOperand V = Node->getOperand(i);
+ std::map<SDOperand, std::vector<unsigned> >::iterator I = Values.find(V);
+ if (I != Values.end())
+ I->second.push_back(i);
+ else
+ Values[V].push_back(i);
+ if (V.getOpcode() != ISD::UNDEF)
+ isOnlyLowElement = false;
+ if (SplatValue != V)
+ SplatValue = SDOperand(0,0);
+
+ // If this isn't a constant element or an undef, we can't use a constant
+ // pool load.
+ if (!isa<ConstantFPSDNode>(V) && !isa<ConstantSDNode>(V) &&
+ V.getOpcode() != ISD::UNDEF)
+ isConstant = false;
+ }
+
+ if (isOnlyLowElement) {
+ // If the low element is an undef too, then this whole things is an undef.
+ if (Node->getOperand(0).getOpcode() == ISD::UNDEF)
+ return DAG.getNode(ISD::UNDEF, Node->getValueType(0));
+ // Otherwise, turn this into a scalar_to_vector node.
+ return DAG.getNode(ISD::SCALAR_TO_VECTOR, Node->getValueType(0),
+ Node->getOperand(0));
+ }
+
+ // If all elements are constants, create a load from the constant pool.
+ if (isConstant) {
+ MVT::ValueType VT = Node->getValueType(0);
+ const Type *OpNTy =
+ MVT::getTypeForValueType(Node->getOperand(0).getValueType());
+ std::vector<Constant*> CV;
+ for (unsigned i = 0, e = NumElems; i != e; ++i) {
+ if (ConstantFPSDNode *V =
+ dyn_cast<ConstantFPSDNode>(Node->getOperand(i))) {
+ CV.push_back(ConstantFP::get(OpNTy, V->getValue()));
+ } else if (ConstantSDNode *V =
+ dyn_cast<ConstantSDNode>(Node->getOperand(i))) {
+ CV.push_back(ConstantUInt::get(OpNTy, V->getValue()));
+ } else {
+ assert(Node->getOperand(i).getOpcode() == ISD::UNDEF);
+ CV.push_back(UndefValue::get(OpNTy));
+ }
+ }
+ Constant *CP = ConstantPacked::get(CV);
+ SDOperand CPIdx = DAG.getConstantPool(CP, TLI.getPointerTy());
+ return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
+ DAG.getSrcValue(NULL));
+ }
+
+ if (SplatValue.Val) { // Splat of one value?
+ // Build the shuffle constant vector: <0, 0, 0, 0>
+ MVT::ValueType MaskVT =
+ MVT::getIntVectorWithNumElements(NumElems);
+ SDOperand Zero = DAG.getConstant(0, MVT::getVectorBaseType(MaskVT));
+ std::vector<SDOperand> ZeroVec(NumElems, Zero);
+ SDOperand SplatMask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, ZeroVec);
+
+ // If the target supports VECTOR_SHUFFLE and this shuffle mask, use it.
+ if (TLI.isShuffleLegal(Node->getValueType(0), SplatMask)) {
+ // Get the splatted value into the low element of a vector register.
+ SDOperand LowValVec =
+ DAG.getNode(ISD::SCALAR_TO_VECTOR, Node->getValueType(0), SplatValue);
+
+ // Return shuffle(LowValVec, undef, <0,0,0,0>)
+ return DAG.getNode(ISD::VECTOR_SHUFFLE, Node->getValueType(0), LowValVec,
+ DAG.getNode(ISD::UNDEF, Node->getValueType(0)),
+ SplatMask);
+ }
+ }
+
+ // If there are only two unique elements, we may be able to turn this into a
+ // vector shuffle.
+ if (Values.size() == 2) {
+ // Build the shuffle constant vector: e.g. <0, 4, 0, 4>
+ MVT::ValueType MaskVT =
+ MVT::getIntVectorWithNumElements(NumElems);
+ std::vector<SDOperand> MaskVec(NumElems);
+ unsigned i = 0;
+ for (std::map<SDOperand,std::vector<unsigned> >::iterator I=Values.begin(),
+ E = Values.end(); I != E; ++I) {
+ for (std::vector<unsigned>::iterator II = I->second.begin(),
+ EE = I->second.end(); II != EE; ++II)
+ MaskVec[*II] = DAG.getConstant(i, MVT::getVectorBaseType(MaskVT));
+ i += NumElems;
+ }
+ SDOperand ShuffleMask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, MaskVec);
+
+ // If the target supports VECTOR_SHUFFLE and this shuffle mask, use it.
+ if (TLI.isShuffleLegal(Node->getValueType(0), ShuffleMask) &&
+ TLI.isOperationLegal(ISD::SCALAR_TO_VECTOR, Node->getValueType(0))) {
+ std::vector<SDOperand> Ops;
+ for(std::map<SDOperand,std::vector<unsigned> >::iterator I=Values.begin(),
+ E = Values.end(); I != E; ++I) {
+ SDOperand Op = DAG.getNode(ISD::SCALAR_TO_VECTOR, Node->getValueType(0),
+ I->first);
+ Ops.push_back(Op);
+ }
+ Ops.push_back(ShuffleMask);
+
+ // Return shuffle(LoValVec, HiValVec, <0,1,0,1>)
+ return DAG.getNode(ISD::VECTOR_SHUFFLE, Node->getValueType(0), Ops);
+ }
+ }
+
+ // Otherwise, we can't handle this case efficiently. Allocate a sufficiently
+ // aligned object on the stack, store each element into it, then load
+ // the result as a vector.
+ MVT::ValueType VT = Node->getValueType(0);
+ // Create the stack frame object.
+ SDOperand FIPtr = CreateStackTemporary(VT);
+
+ // Emit a store of each element to the stack slot.
+ std::vector<SDOperand> Stores;
+ unsigned TypeByteSize =
+ MVT::getSizeInBits(Node->getOperand(0).getValueType())/8;
+ unsigned VectorSize = MVT::getSizeInBits(VT)/8;
+ // Store (in the right endianness) the elements to memory.
+ for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
+ // Ignore undef elements.
+ if (Node->getOperand(i).getOpcode() == ISD::UNDEF) continue;
+
+ unsigned Offset = TypeByteSize*i;
+
+ SDOperand Idx = DAG.getConstant(Offset, FIPtr.getValueType());
+ Idx = DAG.getNode(ISD::ADD, FIPtr.getValueType(), FIPtr, Idx);
+
+ Stores.push_back(DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
+ Node->getOperand(i), Idx,
+ DAG.getSrcValue(NULL)));
+ }
+
+ SDOperand StoreChain;
+ if (!Stores.empty()) // Not all undef elements?
+ StoreChain = DAG.getNode(ISD::TokenFactor, MVT::Other, Stores);
+ else
+ StoreChain = DAG.getEntryNode();
+
+ // Result is a load from the stack slot.
+ return DAG.getLoad(VT, StoreChain, FIPtr, DAG.getSrcValue(0));
+}
+
+/// CreateStackTemporary - Create a stack temporary, suitable for holding the
+/// specified value type.
+SDOperand SelectionDAGLegalize::CreateStackTemporary(MVT::ValueType VT) {
+ MachineFrameInfo *FrameInfo = DAG.getMachineFunction().getFrameInfo();
+ unsigned ByteSize = MVT::getSizeInBits(VT)/8;
+ int FrameIdx = FrameInfo->CreateStackObject(ByteSize, ByteSize);
+ return DAG.getFrameIndex(FrameIdx, TLI.getPointerTy());
+}
+
void SelectionDAGLegalize::ExpandShiftParts(unsigned NodeOp,
SDOperand Op, SDOperand Amt,
SDOperand &Lo, SDOperand &Hi) {
// word offset constant for Hi/Lo address computation
SDOperand WordOff = DAG.getConstant(sizeof(int), TLI.getPointerTy());
// set up Hi and Lo (into buffer) address based on endian
- SDOperand Hi, Lo;
- if (TLI.isLittleEndian()) {
- Hi = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, WordOff);
- Lo = StackSlot;
- } else {
- Hi = StackSlot;
- Lo = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, WordOff);
- }
+ SDOperand Hi = StackSlot;
+ SDOperand Lo = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot,WordOff);
+ if (TLI.isLittleEndian())
+ std::swap(Hi, Lo);
+
// if signed map to unsigned space
SDOperand Op0Mapped;
if (isSigned) {
}
switch (Node->getOpcode()) {
- case ISD::VConstant: {
+ default: Node->dump(); assert(0 && "Unknown vector operation!");
+ case ISD::VBUILD_VECTOR: {
std::vector<SDOperand> LoOps(Node->op_begin(), Node->op_begin()+NewNumElts);
LoOps.push_back(NewNumEltsNode);
LoOps.push_back(TypeNode);
- Lo = DAG.getNode(ISD::VConstant, MVT::Vector, LoOps);
+ Lo = DAG.getNode(ISD::VBUILD_VECTOR, MVT::Vector, LoOps);
std::vector<SDOperand> HiOps(Node->op_begin()+NewNumElts, Node->op_end()-2);
HiOps.push_back(NewNumEltsNode);
HiOps.push_back(TypeNode);
- Hi = DAG.getNode(ISD::VConstant, MVT::Vector, HiOps);
+ Hi = DAG.getNode(ISD::VBUILD_VECTOR, MVT::Vector, HiOps);
break;
}
case ISD::VADD:
std::swap(Lo, Hi);
break;
}
+ case ISD::VBIT_CONVERT: {
+ // We know the result is a vector. The input may be either a vector or a
+ // scalar value.
+ if (Op.getOperand(0).getValueType() != MVT::Vector) {
+ // Lower to a store/load. FIXME: this could be improved probably.
+ SDOperand Ptr = CreateStackTemporary(Op.getOperand(0).getValueType());
+
+ SDOperand St = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
+ Op.getOperand(0), Ptr, DAG.getSrcValue(0));
+ MVT::ValueType EVT = cast<VTSDNode>(TypeNode)->getVT();
+ St = DAG.getVecLoad(NumElements, EVT, St, Ptr, DAG.getSrcValue(0));
+ SplitVectorOp(St, Lo, Hi);
+ } else {
+ // If the input is a vector type, we have to either scalarize it, pack it
+ // or convert it based on whether the input vector type is legal.
+ SDNode *InVal = Node->getOperand(0).Val;
+ unsigned NumElems =
+ cast<ConstantSDNode>(*(InVal->op_end()-2))->getValue();
+ MVT::ValueType EVT = cast<VTSDNode>(*(InVal->op_end()-1))->getVT();
+
+ // If the input is from a single element vector, scalarize the vector,
+ // then treat like a scalar.
+ if (NumElems == 1) {
+ SDOperand Scalar = PackVectorOp(Op.getOperand(0), EVT);
+ Scalar = DAG.getNode(ISD::VBIT_CONVERT, MVT::Vector, Scalar,
+ Op.getOperand(1), Op.getOperand(2));
+ SplitVectorOp(Scalar, Lo, Hi);
+ } else {
+ // Split the input vector.
+ SplitVectorOp(Op.getOperand(0), Lo, Hi);
+
+ // Convert each of the pieces now.
+ Lo = DAG.getNode(ISD::VBIT_CONVERT, MVT::Vector, Lo,
+ NewNumEltsNode, TypeNode);
+ Hi = DAG.getNode(ISD::VBIT_CONVERT, MVT::Vector, Hi,
+ NewNumEltsNode, TypeNode);
+ }
+ break;
+ }
+ }
}
// Remember in a map if the values will be reused later.
SDOperand Result;
switch (Node->getOpcode()) {
- default: assert(0 && "Unknown vector operation!");
+ default:
+ Node->dump(); std::cerr << "\n";
+ assert(0 && "Unknown vector operation in PackVectorOp!");
case ISD::VADD:
case ISD::VSUB:
case ISD::VMUL:
PackVectorOp(Node->getOperand(1), NewVT));
break;
case ISD::VLOAD: {
- SDOperand Ch = LegalizeOp(Node->getOperand(2)); // Legalize the chain.
- SDOperand Ptr = LegalizeOp(Node->getOperand(3)); // Legalize the pointer.
+ SDOperand Ch = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
+ SDOperand Ptr = LegalizeOp(Node->getOperand(1)); // Legalize the pointer.
- Result = DAG.getLoad(NewVT, Ch, Ptr, Node->getOperand(4));
+ Result = DAG.getLoad(NewVT, Ch, Ptr, Node->getOperand(2));
// Remember that we legalized the chain.
AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1)));
break;
}
- case ISD::VConstant:
- if (!MVT::isVector(NewVT)) {
+ case ISD::VBUILD_VECTOR:
+ if (Node->getOperand(0).getValueType() == NewVT) {
+ // Returning a scalar?
Result = Node->getOperand(0);
} else {
- // If type of bisected vector is legal, turn it into a ConstantVec (which
- // will be lowered to a ConstantPool or something else). Otherwise, bisect
- // the VConstant, and return each half as a new VConstant.
+ // Returning a BUILD_VECTOR?
std::vector<SDOperand> Ops(Node->op_begin(), Node->op_end()-2);
- Result = DAG.getNode(ISD::ConstantVec, NewVT, Ops);
+ Result = DAG.getNode(ISD::BUILD_VECTOR, NewVT, Ops);
+ }
+ break;
+ case ISD::VINSERT_VECTOR_ELT:
+ if (!MVT::isVector(NewVT)) {
+ // Returning a scalar? Must be the inserted element.
+ Result = Node->getOperand(1);
+ } else {
+ Result = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVT,
+ PackVectorOp(Node->getOperand(0), NewVT),
+ Node->getOperand(1), Node->getOperand(2));
}
break;
+ case ISD::VVECTOR_SHUFFLE:
+ if (!MVT::isVector(NewVT)) {
+ // Returning a scalar? Figure out if it is the LHS or RHS and return it.
+ SDOperand EltNum = Node->getOperand(2).getOperand(0);
+ if (cast<ConstantSDNode>(EltNum)->getValue())
+ Result = PackVectorOp(Node->getOperand(1), NewVT);
+ else
+ Result = PackVectorOp(Node->getOperand(0), NewVT);
+ } else {
+ // Otherwise, return a VECTOR_SHUFFLE node. First convert the index
+ // vector from a VBUILD_VECTOR to a BUILD_VECTOR.
+ std::vector<SDOperand> BuildVecIdx(Node->getOperand(2).Val->op_begin(),
+ Node->getOperand(2).Val->op_end()-2);
+ MVT::ValueType BVT = MVT::getIntVectorWithNumElements(BuildVecIdx.size());
+ SDOperand BV = DAG.getNode(ISD::BUILD_VECTOR, BVT, BuildVecIdx);
+
+ Result = DAG.getNode(ISD::VECTOR_SHUFFLE, NewVT,
+ PackVectorOp(Node->getOperand(0), NewVT),
+ PackVectorOp(Node->getOperand(1), NewVT), BV);
+ }
+ break;
+ case ISD::VBIT_CONVERT:
+ if (Op.getOperand(0).getValueType() != MVT::Vector)
+ Result = DAG.getNode(ISD::BIT_CONVERT, NewVT, Op.getOperand(0));
+ else {
+ // If the input is a vector type, we have to either scalarize it, pack it
+ // or convert it based on whether the input vector type is legal.
+ SDNode *InVal = Node->getOperand(0).Val;
+ unsigned NumElems =
+ cast<ConstantSDNode>(*(InVal->op_end()-2))->getValue();
+ MVT::ValueType EVT = cast<VTSDNode>(*(InVal->op_end()-1))->getVT();
+
+ // Figure out if there is a Packed type corresponding to this Vector
+ // type. If so, convert to the packed type.
+ MVT::ValueType TVT = MVT::getVectorType(EVT, NumElems);
+ if (TVT != MVT::Other && TLI.isTypeLegal(TVT)) {
+ // Turn this into a bit convert of the packed input.
+ Result = DAG.getNode(ISD::BIT_CONVERT, NewVT,
+ PackVectorOp(Node->getOperand(0), TVT));
+ break;
+ } else if (NumElems == 1) {
+ // Turn this into a bit convert of the scalar input.
+ Result = DAG.getNode(ISD::BIT_CONVERT, NewVT,
+ PackVectorOp(Node->getOperand(0), EVT));
+ break;
+ } else {
+ // FIXME: UNIMP!
+ assert(0 && "Cast from unsupported vector type not implemented yet!");
+ }
+ }
}
if (TLI.isTypeLegal(NewVT))
projects / oota-llvm.git / blobdiff