Expand small memmovs using inline code. Set the X86 threshold for expanding

[oota-llvm.git] / lib / CodeGen / SelectionDAG / LegalizeTypesSplit.cpp

diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp b/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp
index f6fdd2b8a3a1dd8cf5fbb11644ec2ed9ff45dcde..d1057c98cd09662cb3b4ad747b2e15eb3148f7f2 100644 (file)
--- a/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeTypesSplit.cpp
@@ -45,7 +45,7 @@ static void GetSplitDestVTs(MVT::ValueType InVT,
 /// legalization, we just know that (at least) one result needs vector
 /// splitting.
 void DAGTypeLegalizer::SplitResult(SDNode *N, unsigned ResNo) {
-  DEBUG(cerr << "Expand node result: "; N->dump(&DAG); cerr << "\n");
+  DEBUG(cerr << "Split node result: "; N->dump(&DAG); cerr << "\n");
   SDOperand Lo, Hi;
   
 #if 0
@@ -126,6 +126,7 @@ void DAGTypeLegalizer::SplitRes_UNDEF(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
 
 void DAGTypeLegalizer::SplitRes_LOAD(LoadSDNode *LD, 
                                      SDOperand &Lo, SDOperand &Hi) {
+  // FIXME: Add support for indexed loads.
   MVT::ValueType LoVT, HiVT;
   GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
   
@@ -171,7 +172,7 @@ void DAGTypeLegalizer::SplitRes_INSERT_VECTOR_ELT(SDNode *N, SDOperand &Lo,
                      N->getOperand(2));
   else
     Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, Hi.getValueType(), Hi, ScalarOp,
-                     DAG.getConstant(Index - LoNumElts, TLI.getPointerTy()));
+                     DAG.getIntPtrConstant(Index - LoNumElts));
 }
 
 void DAGTypeLegalizer::SplitRes_VECTOR_SHUFFLE(SDNode *N, 
@@ -179,8 +180,6 @@ void DAGTypeLegalizer::SplitRes_VECTOR_SHUFFLE(SDNode *N,
   // Build the low part.
   SDOperand Mask = N->getOperand(2);
   SmallVector<SDOperand, 16> Ops;
-  MVT::ValueType PtrVT = TLI.getPointerTy();
-  
   MVT::ValueType LoVT, HiVT;
   GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
   MVT::ValueType EltVT = MVT::getVectorElementType(LoVT);
@@ -198,7 +197,7 @@ void DAGTypeLegalizer::SplitRes_VECTOR_SHUFFLE(SDNode *N,
       Idx -= NumElements;
     }
     Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, EltVT, InVec,
-                              DAG.getConstant(Idx, PtrVT)));
+                              DAG.getIntPtrConstant(Idx)));
   }
   Lo = DAG.getNode(ISD::BUILD_VECTOR, LoVT, &Ops[0], Ops.size());
   Ops.clear();
@@ -211,7 +210,7 @@ void DAGTypeLegalizer::SplitRes_VECTOR_SHUFFLE(SDNode *N,
       Idx -= NumElements;
     }
     Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, EltVT, InVec,
-                              DAG.getConstant(Idx, PtrVT)));
+                              DAG.getIntPtrConstant(Idx)));
   }
   Hi = DAG.getNode(ISD::BUILD_VECTOR, HiVT, &Ops[0], Ops.size());
 }
@@ -257,26 +256,21 @@ void DAGTypeLegalizer::SplitRes_BIT_CONVERT(SDNode *N,
 
   SDOperand InOp = N->getOperand(0);
   MVT::ValueType InVT = InOp.getValueType();
-  MVT::ValueType NewInVT = TLI.getTypeToTransformTo(InVT);
 
+  // Handle some special cases efficiently.
   switch (getTypeAction(InVT)) {
   default:
     assert(false && "Unknown type action!");
   case Legal:
-    break;
+  case FloatToInt:
   case Promote:
-    break;
   case Scalarize:
-    // While it is tempting to extract the scalarized operand, check whether it
-    // needs expansion, and if so process it in the Expand case below, there is
-    // no guarantee that the scalarized operand has been processed yet.  If it
-    // hasn't then the call to GetExpandedOp will abort.  So just give up.
     break;
   case Expand:
     // A scalar to vector conversion, where the scalar needs expansion.
-    // Check that the vector is being split in two.
-    if (MVT::getSizeInBits(NewInVT) == MVT::getSizeInBits(LoVT)) {
-      // Convert each expanded piece of the scalar now.
+    // If the vector is being split in two then we can just convert the
+    // expanded pieces.
+    if (LoVT == HiVT) {
       GetExpandedOp(InOp, Lo, Hi);
       if (TLI.isBigEndian())
         std::swap(Lo, Hi);
@@ -294,9 +288,18 @@ void DAGTypeLegalizer::SplitRes_BIT_CONVERT(SDNode *N,
     return;
   }
 
-  // Lower the bit-convert to a store/load from the stack, then split the load.
-  SDOperand Op = CreateStackStoreLoad(InOp, N->getValueType(0));
-  SplitRes_LOAD(cast<LoadSDNode>(Op.Val), Lo, Hi);
+  // In the general case, convert the input to an integer and split it by hand.
+  MVT::ValueType LoIntVT = MVT::getIntegerType(MVT::getSizeInBits(LoVT));
+  MVT::ValueType HiIntVT = MVT::getIntegerType(MVT::getSizeInBits(HiVT));
+  if (TLI.isBigEndian())
+    std::swap(LoIntVT, HiIntVT);
+
+  SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
+
+  if (TLI.isBigEndian())
+    std::swap(Lo, Hi);
+  Lo = DAG.getNode(ISD::BIT_CONVERT, LoVT, Lo);
+  Hi = DAG.getNode(ISD::BIT_CONVERT, HiVT, Hi);
 }
 
 void DAGTypeLegalizer::SplitRes_BinOp(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
@@ -396,6 +399,7 @@ bool DAGTypeLegalizer::SplitOperand(SDNode *N, unsigned OpNo) {
 }
 
 SDOperand DAGTypeLegalizer::SplitOp_STORE(StoreSDNode *N, unsigned OpNo) {
+  // FIXME: Add support for indexed stores.
   assert(OpNo == 1 && "Can only split the stored value");
   
   SDOperand Ch  = N->getChain();
@@ -438,21 +442,14 @@ SDOperand DAGTypeLegalizer::SplitOp_BIT_CONVERT(SDNode *N) {
   // split pieces into integers and reassemble.
   SDOperand Lo, Hi;
   GetSplitOp(N->getOperand(0), Lo, Hi);
-
-  unsigned LoBits = MVT::getSizeInBits(Lo.getValueType());
-  Lo = DAG.getNode(ISD::BIT_CONVERT, MVT::getIntegerType(LoBits), Lo);
-
-  unsigned HiBits = MVT::getSizeInBits(Hi.getValueType());
-  Hi = DAG.getNode(ISD::BIT_CONVERT, MVT::getIntegerType(HiBits), Hi);
+  Lo = BitConvertToInteger(Lo);
+  Hi = BitConvertToInteger(Hi);
 
   if (TLI.isBigEndian())
     std::swap(Lo, Hi);
 
-  assert(LoBits == HiBits && "Do not know how to assemble odd sized vectors!");
-
   return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0),
-                     DAG.getNode(ISD::BUILD_PAIR,
-                                 MVT::getIntegerType(LoBits+HiBits), Lo, Hi));
+                     JoinIntegers(Lo, Hi));
 }
 
 SDOperand DAGTypeLegalizer::SplitOp_EXTRACT_VECTOR_ELT(SDNode *N) {