Propagate debug loc info through prologue/epilogue.

[oota-llvm.git] / lib / CodeGen / SelectionDAG / ScheduleDAGList.cpp

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
index fea74ca3038d698f2707f61249668f38d5504479..e63484e987d41a9b52e92c31f517c794ff635ad7 100644 (file)
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
@@ -19,13 +19,13 @@
 //===----------------------------------------------------------------------===//
 
 #define DEBUG_TYPE "pre-RA-sched"
+#include "ScheduleDAGSDNodes.h"
 #include "llvm/CodeGen/LatencyPriorityQueue.h"
-#include "llvm/CodeGen/ScheduleDAGSDNodes.h"
+#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
 #include "llvm/CodeGen/SchedulerRegistry.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Target/TargetData.h"
-#include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/Compiler.h"
@@ -59,14 +59,13 @@ private:
   std::vector<SUnit*> PendingQueue;
 
   /// HazardRec - The hazard recognizer to use.
-  HazardRecognizer *HazardRec;
+  ScheduleHazardRecognizer *HazardRec;
 
 public:
-  ScheduleDAGList(SelectionDAG *dag, MachineBasicBlock *bb,
-                  const TargetMachine &tm,
+  ScheduleDAGList(MachineFunction &mf,
                   SchedulingPriorityQueue *availqueue,
-                  HazardRecognizer *HR)
-    : ScheduleDAGSDNodes(dag, bb, tm),
+                  ScheduleHazardRecognizer *HR)
+    : ScheduleDAGSDNodes(mf),
       AvailableQueue(availqueue), HazardRec(HR) {
     }
 
@@ -79,14 +78,12 @@ public:
 
 private:
   void ReleaseSucc(SUnit *SU, const SDep &D);
+  void ReleaseSuccessors(SUnit *SU);
   void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
   void ListScheduleTopDown();
 };
 }  // end anonymous namespace
 
-HazardRecognizer::~HazardRecognizer() {}
-
-
 /// Schedule - Schedule the DAG using list scheduling.
 void ScheduleDAGList::Schedule() {
   DOUT << "********** List Scheduling **********\n";
@@ -122,8 +119,20 @@ void ScheduleDAGList::ReleaseSucc(SUnit *SU, const SDep &D) {
   
   SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency());
   
-  if (SuccSU->NumPredsLeft == 0) {
+  // If all the node's predecessors are scheduled, this node is ready
+  // to be scheduled. Ignore the special ExitSU node.
+  if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU)
     PendingQueue.push_back(SuccSU);
+}
+
+void ScheduleDAGList::ReleaseSuccessors(SUnit *SU) {
+  // Top down: release successors.
+  for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
+       I != E; ++I) {
+    assert(!I->isAssignedRegDep() &&
+           "The list-td scheduler doesn't yet support physreg dependencies!");
+
+    ReleaseSucc(SU, *I);
   }
 }
 
@@ -138,11 +147,7 @@ void ScheduleDAGList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
   assert(CurCycle >= SU->getDepth() && "Node scheduled above its depth!");
   SU->setDepthToAtLeast(CurCycle);
 
-  // Top down: release successors.
-  for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
-       I != E; ++I)
-    ReleaseSucc(SU, *I);
-
+  ReleaseSuccessors(SU);
   SU->isScheduled = true;
   AvailableQueue->ScheduledNode(SU);
 }
@@ -152,6 +157,9 @@ void ScheduleDAGList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
 void ScheduleDAGList::ListScheduleTopDown() {
   unsigned CurCycle = 0;
 
+  // Release any successors of the special Entry node.
+  ReleaseSuccessors(&EntrySU);
+
   // All leaves to Available queue.
   for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
     // It is available if it has no predecessors.
@@ -188,31 +196,20 @@ void ScheduleDAGList::ListScheduleTopDown() {
     }
 
     SUnit *FoundSUnit = 0;
-    SDNode *FoundNode = 0;
     
     bool HasNoopHazards = false;
     while (!AvailableQueue->empty()) {
       SUnit *CurSUnit = AvailableQueue->pop();
       
-      // Get the node represented by this SUnit.
-      FoundNode = CurSUnit->getNode();
-      
-      // If this is a pseudo op, like copyfromreg, look to see if there is a
-      // real target node flagged to it.  If so, use the target node.
-      while (!FoundNode->isMachineOpcode()) {
-        SDNode *N = FoundNode->getFlaggedNode();
-        if (!N) break;
-        FoundNode = N;
-      }
-    
-      HazardRecognizer::HazardType HT = HazardRec->getHazardType(FoundNode);
-      if (HT == HazardRecognizer::NoHazard) {
+      ScheduleHazardRecognizer::HazardType HT =
+        HazardRec->getHazardType(CurSUnit);
+      if (HT == ScheduleHazardRecognizer::NoHazard) {
         FoundSUnit = CurSUnit;
         break;
       }
     
       // Remember if this is a noop hazard.
-      HasNoopHazards |= HT == HazardRecognizer::NoopHazard;
+      HasNoopHazards |= HT == ScheduleHazardRecognizer::NoopHazard;
       
       NotReady.push_back(CurSUnit);
     }
@@ -226,7 +223,7 @@ void ScheduleDAGList::ListScheduleTopDown() {
     // If we found a node to schedule, do it now.
     if (FoundSUnit) {
       ScheduleNodeTopDown(FoundSUnit, CurCycle);
-      HazardRec->EmitInstruction(FoundNode);
+      HazardRec->EmitInstruction(FoundSUnit);
 
       // If this is a pseudo-op node, we don't want to increment the current
       // cycle.
@@ -245,7 +242,7 @@ void ScheduleDAGList::ListScheduleTopDown() {
       // processors without pipeline interlocks and other cases.
       DOUT << "*** Emitting noop\n";
       HazardRec->EmitNoop();
-      Sequence.push_back(0);   // NULL SUnit* -> noop
+      Sequence.push_back(0);   // NULL here means noop
       ++NumNoops;
       ++CurCycle;
     }
@@ -263,11 +260,9 @@ void ScheduleDAGList::ListScheduleTopDown() {
 /// createTDListDAGScheduler - This creates a top-down list scheduler with a
 /// new hazard recognizer. This scheduler takes ownership of the hazard
 /// recognizer and deletes it when done.
-ScheduleDAG* llvm::createTDListDAGScheduler(SelectionDAGISel *IS,
-                                            SelectionDAG *DAG,
-                                            const TargetMachine *TM,
-                                            MachineBasicBlock *BB, bool Fast) {
-  return new ScheduleDAGList(DAG, BB, *TM,
+ScheduleDAGSDNodes *
+llvm::createTDListDAGScheduler(SelectionDAGISel *IS, bool Fast) {
+  return new ScheduleDAGList(*IS->MF,
                              new LatencyPriorityQueue(),
                              IS->CreateTargetHazardRecognizer());
 }