/// makeVTList - Return an instance of the SDVTList struct initialized with the
/// specified members.
-static SDVTList makeVTList(const MVT::ValueType *VTs, unsigned NumVTs) {
+static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
SDVTList Res = {VTs, NumVTs};
return Res;
}
-static const fltSemantics *MVTToAPFloatSemantics(MVT::ValueType VT) {
- switch (VT) {
+static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
+ switch (VT.getSimpleVT()) {
default: assert(0 && "Unknown FP format");
case MVT::f32: return &APFloat::IEEEsingle;
case MVT::f64: return &APFloat::IEEEdouble;
return Value.bitwiseIsEqual(V);
}
-bool ConstantFPSDNode::isValueValidForType(MVT::ValueType VT,
+bool ConstantFPSDNode::isValueValidForType(MVT VT,
const APFloat& Val) {
- assert(MVT::isFloatingPoint(VT) && "Can only convert between FP types");
+ assert(VT.isFloatingPoint() && "Can only convert between FP types");
- // Anything can be extended to ppc long double.
- if (VT == MVT::ppcf128)
- return true;
-
- // PPC long double cannot be shrunk to anything though.
- if (&Val.getSemantics() == &APFloat::PPCDoubleDouble)
+ // PPC long double cannot be converted to any other type.
+ if (VT == MVT::ppcf128 ||
+ &Val.getSemantics() == &APFloat::PPCDoubleDouble)
return false;
// convert modifies in place, so make a copy.
switch (Result) {
default: break;
case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
+ case ISD::SETOEQ: // SETEQ & SETU[LG]E
case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
/// solely with their pointer.
-void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
+static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
ID.AddPointer(VTList.VTs);
}
/// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
///
static void AddNodeIDOperands(FoldingSetNodeID &ID,
- const SDOperand *Ops, unsigned NumOps) {
+ SDOperandPtr Ops, unsigned NumOps) {
for (; NumOps; --NumOps, ++Ops) {
ID.AddPointer(Ops->Val);
ID.AddInteger(Ops->ResNo);
static void AddNodeIDNode(FoldingSetNodeID &ID,
unsigned short OpC, SDVTList VTList,
- const SDOperand *OpList, unsigned N) {
+ SDOperandPtr OpList, unsigned N) {
AddNodeIDOpcode(ID, OpC);
AddNodeIDValueTypes(ID, VTList);
AddNodeIDOperands(ID, OpList, N);
}
+
/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
/// data.
static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) {
LoadSDNode *LD = cast<LoadSDNode>(N);
ID.AddInteger(LD->getAddressingMode());
ID.AddInteger(LD->getExtensionType());
- ID.AddInteger((unsigned int)(LD->getMemoryVT()));
+ ID.AddInteger(LD->getMemoryVT().getRawBits());
ID.AddInteger(LD->getAlignment());
ID.AddInteger(LD->isVolatile());
break;
StoreSDNode *ST = cast<StoreSDNode>(N);
ID.AddInteger(ST->getAddressingMode());
ID.AddInteger(ST->isTruncatingStore());
- ID.AddInteger((unsigned int)(ST->getMemoryVT()));
+ ID.AddInteger(ST->getMemoryVT().getRawBits());
ID.AddInteger(ST->getAlignment());
ID.AddInteger(ST->isVolatile());
break;
// Next, brutally remove the operand list. This is safe to do, as there are
// no cycles in the graph.
for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
- SDNode *Operand = I->Val;
+ SDNode *Operand = I->getVal();
Operand->removeUser(std::distance(N->op_begin(), I), N);
// Now that we removed this operand, see if there are no uses of it left.
DeadNodes.pop_back();
if (UpdateListener)
- UpdateListener->NodeDeleted(N);
+ UpdateListener->NodeDeleted(N, 0);
// Take the node out of the appropriate CSE map.
RemoveNodeFromCSEMaps(N);
// Next, brutally remove the operand list. This is safe to do, as there are
// no cycles in the graph.
for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
- SDNode *Operand = I->Val;
+ SDNode *Operand = I->getVal();
Operand->removeUser(std::distance(N->op_begin(), I), N);
// Now that we removed this operand, see if there are no uses of it left.
// Drop all of the operands and decrement used nodes use counts.
for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
- I->Val->removeUser(std::distance(N->op_begin(), I), N);
+ I->getVal()->removeUser(std::distance(N->op_begin(), I), N);
if (N->OperandsNeedDelete) {
delete[] N->OperandList;
}
TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
break;
case ISD::VALUETYPE: {
- MVT::ValueType VT = cast<VTSDNode>(N)->getVT();
- if (MVT::isExtendedVT(VT)) {
+ MVT VT = cast<VTSDNode>(N)->getVT();
+ if (VT.isExtended()) {
Erased = ExtendedValueTypeNodes.erase(VT);
} else {
- Erased = ValueTypeNodes[VT] != 0;
- ValueTypeNodes[VT] = 0;
+ Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
+ ValueTypeNodes[VT.getSimpleVT()] = 0;
}
break;
}
/// return null, otherwise return a pointer to the slot it would take. If a
/// node already exists with these operands, the slot will be non-null.
SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
- const SDOperand *Ops,unsigned NumOps,
+ SDOperandPtr Ops,unsigned NumOps,
void *&InsertPos) {
if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
return 0; // Never add these nodes.
if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
ID.AddInteger(LD->getAddressingMode());
ID.AddInteger(LD->getExtensionType());
- ID.AddInteger((unsigned int)(LD->getMemoryVT()));
+ ID.AddInteger(LD->getMemoryVT().getRawBits());
ID.AddInteger(LD->getAlignment());
ID.AddInteger(LD->isVolatile());
} else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
ID.AddInteger(ST->getAddressingMode());
ID.AddInteger(ST->isTruncatingStore());
- ID.AddInteger((unsigned int)(ST->getMemoryVT()));
+ ID.AddInteger(ST->getMemoryVT().getRawBits());
ID.AddInteger(ST->getAlignment());
ID.AddInteger(ST->isVolatile());
}
}
}
-SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) {
+SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT VT) {
if (Op.getValueType() == VT) return Op;
APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
- MVT::getSizeInBits(VT));
+ VT.getSizeInBits());
return getNode(ISD::AND, Op.getValueType(), Op,
getConstant(Imm, Op.getValueType()));
}
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT, bool isT) {
- MVT::ValueType EltVT =
- MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
+SDOperand SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
+ MVT EltVT =
+ VT.isVector() ? VT.getVectorElementType() : VT;
- return getConstant(APInt(MVT::getSizeInBits(EltVT), Val), VT, isT);
+ return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
}
-SDOperand SelectionDAG::getConstant(const APInt &Val, MVT::ValueType VT, bool isT) {
- assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
+SDOperand SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
+ assert(VT.isInteger() && "Cannot create FP integer constant!");
- MVT::ValueType EltVT =
- MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
+ MVT EltVT =
+ VT.isVector() ? VT.getVectorElementType() : VT;
- assert(Val.getBitWidth() == MVT::getSizeInBits(EltVT) &&
+ assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
"APInt size does not match type size!");
unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
FoldingSetNodeID ID;
- AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
+ AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0);
ID.Add(Val);
void *IP = 0;
SDNode *N = NULL;
if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
- if (!MVT::isVector(VT))
+ if (!VT.isVector())
return SDOperand(N, 0);
if (!N) {
N = new ConstantSDNode(isT, Val, EltVT);
}
SDOperand Result(N, 0);
- if (MVT::isVector(VT)) {
+ if (VT.isVector()) {
SmallVector<SDOperand, 8> Ops;
- Ops.assign(MVT::getVectorNumElements(VT), Result);
+ Ops.assign(VT.getVectorNumElements(), Result);
Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
}
return Result;
}
-SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT::ValueType VT,
- bool isTarget) {
- assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!");
+SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
+ assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
- MVT::ValueType EltVT =
- MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
+ MVT EltVT =
+ VT.isVector() ? VT.getVectorElementType() : VT;
// Do the map lookup using the actual bit pattern for the floating point
// value, so that we don't have problems with 0.0 comparing equal to -0.0, and
// we don't have issues with SNANs.
unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
FoldingSetNodeID ID;
- AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
+ AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0);
ID.Add(V);
void *IP = 0;
SDNode *N = NULL;
if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
- if (!MVT::isVector(VT))
+ if (!VT.isVector())
return SDOperand(N, 0);
if (!N) {
N = new ConstantFPSDNode(isTarget, V, EltVT);
}
SDOperand Result(N, 0);
- if (MVT::isVector(VT)) {
+ if (VT.isVector()) {
SmallVector<SDOperand, 8> Ops;
- Ops.assign(MVT::getVectorNumElements(VT), Result);
+ Ops.assign(VT.getVectorNumElements(), Result);
Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
}
return Result;
}
-SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT,
- bool isTarget) {
- MVT::ValueType EltVT =
- MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
+SDOperand SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
+ MVT EltVT =
+ VT.isVector() ? VT.getVectorElementType() : VT;
if (EltVT==MVT::f32)
return getConstantFP(APFloat((float)Val), VT, isTarget);
else
}
SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
- MVT::ValueType VT, int Offset,
+ MVT VT, int Offset,
bool isTargetGA) {
unsigned Opc;
Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
FoldingSetNodeID ID;
- AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
+ AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
ID.AddPointer(GV);
ID.AddInteger(Offset);
void *IP = 0;
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT,
- bool isTarget) {
+SDOperand SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
FoldingSetNodeID ID;
- AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
+ AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
ID.AddInteger(FI);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getJumpTable(int JTI, MVT::ValueType VT, bool isTarget){
+SDOperand SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
FoldingSetNodeID ID;
- AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
+ AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
ID.AddInteger(JTI);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getConstantPool(Constant *C, MVT::ValueType VT,
+SDOperand SelectionDAG::getConstantPool(Constant *C, MVT VT,
unsigned Alignment, int Offset,
bool isTarget) {
unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
FoldingSetNodeID ID;
- AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
+ AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
ID.AddInteger(Alignment);
ID.AddInteger(Offset);
ID.AddPointer(C);
}
-SDOperand SelectionDAG::getConstantPool(MachineConstantPoolValue *C,
- MVT::ValueType VT,
+SDOperand SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
unsigned Alignment, int Offset,
bool isTarget) {
unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
FoldingSetNodeID ID;
- AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
+ AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
ID.AddInteger(Alignment);
ID.AddInteger(Offset);
C->AddSelectionDAGCSEId(ID);
SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
FoldingSetNodeID ID;
- AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
+ AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), (SDOperand*)0, 0);
ID.AddPointer(MBB);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
SDOperand SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
FoldingSetNodeID ID;
- AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
+ AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), (SDOperand*)0, 0);
ID.AddInteger(Flags.getRawBits());
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getValueType(MVT::ValueType VT) {
- if (!MVT::isExtendedVT(VT) && (unsigned)VT >= ValueTypeNodes.size())
- ValueTypeNodes.resize(VT+1);
+SDOperand SelectionDAG::getValueType(MVT VT) {
+ if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
+ ValueTypeNodes.resize(VT.getSimpleVT()+1);
- SDNode *&N = MVT::isExtendedVT(VT) ?
- ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT];
+ SDNode *&N = VT.isExtended() ?
+ ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
if (N) return SDOperand(N, 0);
N = new VTSDNode(VT);
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) {
+SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
SDNode *&N = ExternalSymbols[Sym];
if (N) return SDOperand(N, 0);
N = new ExternalSymbolSDNode(false, Sym, VT);
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym,
- MVT::ValueType VT) {
+SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
SDNode *&N = TargetExternalSymbols[Sym];
if (N) return SDOperand(N, 0);
N = new ExternalSymbolSDNode(true, Sym, VT);
SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) {
if ((unsigned)Cond >= CondCodeNodes.size())
CondCodeNodes.resize(Cond+1);
-
+
if (CondCodeNodes[Cond] == 0) {
CondCodeNodes[Cond] = new CondCodeSDNode(Cond);
AllNodes.push_back(CondCodeNodes[Cond]);
return SDOperand(CondCodeNodes[Cond], 0);
}
-SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT::ValueType VT) {
+SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
FoldingSetNodeID ID;
- AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
+ AddNodeIDNode(ID, ISD::Register, getVTList(VT), (SDOperand*)0, 0);
ID.AddInteger(RegNo);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
"SrcValue is not a pointer?");
FoldingSetNodeID ID;
- AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
+ AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), (SDOperand*)0, 0);
ID.AddPointer(V);
void *IP = 0;
"SrcValue is not a pointer?");
FoldingSetNodeID ID;
- AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
+ AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), (SDOperand*)0, 0);
ID.AddPointer(v);
ID.AddInteger(MO.getFlags());
ID.AddInteger(MO.getOffset());
/// CreateStackTemporary - Create a stack temporary, suitable for holding the
/// specified value type.
-SDOperand SelectionDAG::CreateStackTemporary(MVT::ValueType VT) {
+SDOperand SelectionDAG::CreateStackTemporary(MVT VT) {
MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
- unsigned ByteSize = MVT::getSizeInBits(VT)/8;
- const Type *Ty = MVT::getTypeForValueType(VT);
+ unsigned ByteSize = VT.getSizeInBits()/8;
+ const Type *Ty = VT.getTypeForMVT();
unsigned StackAlign = (unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty);
int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
return getFrameIndex(FrameIdx, TLI.getPointerTy());
}
-SDOperand SelectionDAG::FoldSetCC(MVT::ValueType VT, SDOperand N1,
+SDOperand SelectionDAG::FoldSetCC(MVT VT, SDOperand N1,
SDOperand N2, ISD::CondCode Cond) {
// These setcc operations always fold.
switch (Cond) {
case ISD::SETUO:
case ISD::SETUEQ:
case ISD::SETUNE:
- assert(!MVT::isInteger(N1.getValueType()) && "Illegal setcc for integer!");
+ assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
break;
}
APInt &KnownZero, APInt &KnownOne,
unsigned Depth) const {
unsigned BitWidth = Mask.getBitWidth();
- assert(BitWidth == MVT::getSizeInBits(Op.getValueType()) &&
+ assert(BitWidth == Op.getValueType().getSizeInBits() &&
"Mask size mismatches value type size!");
KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
KnownZero = KnownZeroOut;
return;
}
+ case ISD::MUL: {
+ APInt Mask2 = APInt::getAllOnesValue(BitWidth);
+ ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
+
+ // If low bits are zero in either operand, output low known-0 bits.
+ // Also compute a conserative estimate for high known-0 bits.
+ // More trickiness is possible, but this is sufficient for the
+ // interesting case of alignment computation.
+ KnownOne.clear();
+ unsigned TrailZ = KnownZero.countTrailingOnes() +
+ KnownZero2.countTrailingOnes();
+ unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
+ KnownZero2.countLeadingOnes(),
+ BitWidth) - BitWidth;
+
+ TrailZ = std::min(TrailZ, BitWidth);
+ LeadZ = std::min(LeadZ, BitWidth);
+ KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
+ APInt::getHighBitsSet(BitWidth, LeadZ);
+ KnownZero &= Mask;
+ return;
+ }
+ case ISD::UDIV: {
+ // For the purposes of computing leading zeros we can conservatively
+ // treat a udiv as a logical right shift by the power of 2 known to
+ // be less than the denominator.
+ APInt AllOnes = APInt::getAllOnesValue(BitWidth);
+ ComputeMaskedBits(Op.getOperand(0),
+ AllOnes, KnownZero2, KnownOne2, Depth+1);
+ unsigned LeadZ = KnownZero2.countLeadingOnes();
+
+ KnownOne2.clear();
+ KnownZero2.clear();
+ ComputeMaskedBits(Op.getOperand(1),
+ AllOnes, KnownZero2, KnownOne2, Depth+1);
+ unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
+ if (RHSUnknownLeadingOnes != BitWidth)
+ LeadZ = std::min(BitWidth,
+ LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
+
+ KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
+ return;
+ }
case ISD::SELECT:
ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
}
return;
case ISD::SIGN_EXTEND_INREG: {
- MVT::ValueType EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
- unsigned EBits = MVT::getSizeInBits(EVT);
+ MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
+ unsigned EBits = EVT.getSizeInBits();
// Sign extension. Compute the demanded bits in the result that are not
// present in the input.
case ISD::CTPOP: {
unsigned LowBits = Log2_32(BitWidth)+1;
KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
- KnownOne = APInt(BitWidth, 0);
+ KnownOne.clear();
return;
}
case ISD::LOAD: {
if (ISD::isZEXTLoad(Op.Val)) {
LoadSDNode *LD = cast<LoadSDNode>(Op);
- MVT::ValueType VT = LD->getMemoryVT();
- unsigned MemBits = MVT::getSizeInBits(VT);
+ MVT VT = LD->getMemoryVT();
+ unsigned MemBits = VT.getSizeInBits();
KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
}
return;
}
case ISD::ZERO_EXTEND: {
- MVT::ValueType InVT = Op.getOperand(0).getValueType();
- unsigned InBits = MVT::getSizeInBits(InVT);
+ MVT InVT = Op.getOperand(0).getValueType();
+ unsigned InBits = InVT.getSizeInBits();
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
APInt InMask = Mask;
InMask.trunc(InBits);
return;
}
case ISD::SIGN_EXTEND: {
- MVT::ValueType InVT = Op.getOperand(0).getValueType();
- unsigned InBits = MVT::getSizeInBits(InVT);
+ MVT InVT = Op.getOperand(0).getValueType();
+ unsigned InBits = InVT.getSizeInBits();
APInt InSignBit = APInt::getSignBit(InBits);
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
APInt InMask = Mask;
return;
}
case ISD::ANY_EXTEND: {
- MVT::ValueType InVT = Op.getOperand(0).getValueType();
- unsigned InBits = MVT::getSizeInBits(InVT);
+ MVT InVT = Op.getOperand(0).getValueType();
+ unsigned InBits = InVT.getSizeInBits();
APInt InMask = Mask;
InMask.trunc(InBits);
KnownZero.trunc(InBits);
return;
}
case ISD::TRUNCATE: {
- MVT::ValueType InVT = Op.getOperand(0).getValueType();
- unsigned InBits = MVT::getSizeInBits(InVT);
+ MVT InVT = Op.getOperand(0).getValueType();
+ unsigned InBits = InVT.getSizeInBits();
APInt InMask = Mask;
InMask.zext(InBits);
KnownZero.zext(InBits);
break;
}
case ISD::AssertZext: {
- MVT::ValueType VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
- APInt InMask = APInt::getLowBitsSet(BitWidth, MVT::getSizeInBits(VT));
+ MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
+ APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
KnownOne, Depth+1);
KnownZero |= (~InMask) & Mask;
KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
return;
+ case ISD::SUB: {
+ if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
+ // We know that the top bits of C-X are clear if X contains less bits
+ // than C (i.e. no wrap-around can happen). For example, 20-X is
+ // positive if we can prove that X is >= 0 and < 16.
+ if (CLHS->getAPIntValue().isNonNegative()) {
+ unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
+ // NLZ can't be BitWidth with no sign bit
+ APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
+ ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
+ Depth+1);
+
+ // If all of the MaskV bits are known to be zero, then we know the
+ // output top bits are zero, because we now know that the output is
+ // from [0-C].
+ if ((KnownZero2 & MaskV) == MaskV) {
+ unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
+ // Top bits known zero.
+ KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
+ }
+ }
+ }
+ }
+ // fall through
case ISD::ADD: {
- // If either the LHS or the RHS are Zero, the result is zero.
- ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
- ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
- assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
- assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
-
// Output known-0 bits are known if clear or set in both the low clear bits
// common to both LHS & RHS. For example, 8+(X<<3) is known to have the
// low 3 bits clear.
- unsigned KnownZeroOut = std::min(KnownZero.countTrailingOnes(),
- KnownZero2.countTrailingOnes());
-
- KnownZero = APInt::getLowBitsSet(BitWidth, KnownZeroOut);
- KnownOne = APInt(BitWidth, 0);
+ APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
+ ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
+ assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
+ unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
+
+ ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
+ assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
+ KnownZeroOut = std::min(KnownZeroOut,
+ KnownZero2.countTrailingOnes());
+
+ KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
return;
}
- case ISD::SUB: {
- ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0));
- if (!CLHS) return;
-
- // We know that the top bits of C-X are clear if X contains less bits
- // than C (i.e. no wrap-around can happen). For example, 20-X is
- // positive if we can prove that X is >= 0 and < 16.
- if (CLHS->getAPIntValue().isNonNegative()) {
- unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
- // NLZ can't be BitWidth with no sign bit
- APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
- ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero, KnownOne, Depth+1);
-
- // If all of the MaskV bits are known to be zero, then we know the output
- // top bits are zero, because we now know that the output is from [0-C].
- if ((KnownZero & MaskV) == MaskV) {
- unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
- // Top bits known zero.
- KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
- KnownOne = APInt(BitWidth, 0); // No one bits known.
- } else {
- KnownZero = KnownOne = APInt(BitWidth, 0); // Otherwise, nothing known.
+ case ISD::SREM:
+ if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
+ APInt RA = Rem->getAPIntValue();
+ if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
+ APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
+ APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
+ ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
+
+ // The sign of a remainder is equal to the sign of the first
+ // operand (zero being positive).
+ if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
+ KnownZero2 |= ~LowBits;
+ else if (KnownOne2[BitWidth-1])
+ KnownOne2 |= ~LowBits;
+
+ KnownZero |= KnownZero2 & Mask;
+ KnownOne |= KnownOne2 & Mask;
+
+ assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
}
}
return;
+ case ISD::UREM: {
+ if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
+ APInt RA = Rem->getAPIntValue();
+ if (RA.isPowerOf2()) {
+ APInt LowBits = (RA - 1);
+ APInt Mask2 = LowBits & Mask;
+ KnownZero |= ~LowBits & Mask;
+ ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
+ assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
+ break;
+ }
+ }
+
+ // Since the result is less than or equal to either operand, any leading
+ // zero bits in either operand must also exist in the result.
+ APInt AllOnes = APInt::getAllOnesValue(BitWidth);
+ ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
+ Depth+1);
+ ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
+ Depth+1);
+
+ uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
+ KnownZero2.countLeadingOnes());
+ KnownOne.clear();
+ KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
+ return;
}
default:
// Allow the target to implement this method for its nodes.
/// information. For example, immediately after an "SRA X, 2", we know that
/// the top 3 bits are all equal to each other, so we return 3.
unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{
- MVT::ValueType VT = Op.getValueType();
- assert(MVT::isInteger(VT) && "Invalid VT!");
- unsigned VTBits = MVT::getSizeInBits(VT);
+ MVT VT = Op.getValueType();
+ assert(VT.isInteger() && "Invalid VT!");
+ unsigned VTBits = VT.getSizeInBits();
unsigned Tmp, Tmp2;
+ unsigned FirstAnswer = 1;
if (Depth == 6)
return 1; // Limit search depth.
switch (Op.getOpcode()) {
default: break;
case ISD::AssertSext:
- Tmp = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
+ Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
return VTBits-Tmp+1;
case ISD::AssertZext:
- Tmp = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
+ Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
return VTBits-Tmp;
case ISD::Constant: {
}
case ISD::SIGN_EXTEND:
- Tmp = VTBits-MVT::getSizeInBits(Op.getOperand(0).getValueType());
+ Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
case ISD::SIGN_EXTEND_INREG:
// Max of the input and what this extends.
- Tmp = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
+ Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
Tmp = VTBits-Tmp+1;
Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
case ISD::AND:
case ISD::OR:
case ISD::XOR: // NOT is handled here.
- // Logical binary ops preserve the number of sign bits.
+ // Logical binary ops preserve the number of sign bits at the worst.
Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
- if (Tmp == 1) return 1; // Early out.
- Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
- return std::min(Tmp, Tmp2);
+ if (Tmp != 1) {
+ Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
+ FirstAnswer = std::min(Tmp, Tmp2);
+ // We computed what we know about the sign bits as our first
+ // answer. Now proceed to the generic code that uses
+ // ComputeMaskedBits, and pick whichever answer is better.
+ }
+ break;
case ISD::SELECT:
- Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
+ Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
if (Tmp == 1) return 1; // Early out.
- Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
+ Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
return std::min(Tmp, Tmp2);
case ISD::SETCC:
switch (ExtType) {
default: break;
case ISD::SEXTLOAD: // '17' bits known
- Tmp = MVT::getSizeInBits(LD->getMemoryVT());
+ Tmp = LD->getMemoryVT().getSizeInBits();
return VTBits-Tmp+1;
case ISD::ZEXTLOAD: // '16' bits known
- Tmp = MVT::getSizeInBits(LD->getMemoryVT());
+ Tmp = LD->getMemoryVT().getSizeInBits();
return VTBits-Tmp;
}
}
Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
Op.getOpcode() == ISD::INTRINSIC_VOID) {
unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
- if (NumBits > 1) return NumBits;
+ if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
}
// Finally, if we can prove that the top bits of the result are 0's or 1's,
Mask = KnownOne;
} else {
// Nothing known.
- return 1;
+ return FirstAnswer;
}
// Okay, we know that the sign bit in Mask is set. Use CLZ to determine
Mask <<= Mask.getBitWidth()-VTBits;
// Return # leading zeros. We use 'min' here in case Val was zero before
// shifting. We don't want to return '64' as for an i32 "0".
- return std::min(VTBits, Mask.countLeadingZeros());
+ return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
}
}
+/// getShuffleScalarElt - Returns the scalar element that will make up the ith
+/// element of the result of the vector shuffle.
+SDOperand SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned Idx) {
+ MVT VT = N->getValueType(0);
+ SDOperand PermMask = N->getOperand(2);
+ unsigned NumElems = PermMask.getNumOperands();
+ SDOperand V = (Idx < NumElems) ? N->getOperand(0) : N->getOperand(1);
+ Idx %= NumElems;
+
+ if (V.getOpcode() == ISD::BIT_CONVERT) {
+ V = V.getOperand(0);
+ if (V.getValueType().getVectorNumElements() != NumElems)
+ return SDOperand();
+ }
+ if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
+ return (Idx == 0) ? V.getOperand(0)
+ : getNode(ISD::UNDEF, VT.getVectorElementType());
+ if (V.getOpcode() == ISD::BUILD_VECTOR)
+ return V.getOperand(Idx);
+ if (V.getOpcode() == ISD::VECTOR_SHUFFLE) {
+ SDOperand Elt = PermMask.getOperand(Idx);
+ if (Elt.getOpcode() == ISD::UNDEF)
+ return getNode(ISD::UNDEF, VT.getVectorElementType());
+ return getShuffleScalarElt(V.Val,cast<ConstantSDNode>(Elt)->getValue());
+ }
+ return SDOperand();
+}
+
+
/// getNode - Gets or creates the specified node.
///
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT) {
FoldingSetNodeID ID;
- AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
+ AddNodeIDNode(ID, Opcode, getVTList(VT), (SDOperand*)0, 0);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
- SDOperand Operand) {
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, SDOperand Operand) {
// Constant fold unary operations with an integer constant operand.
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
const APInt &Val = C->getAPIntValue();
- unsigned BitWidth = MVT::getSizeInBits(VT);
+ unsigned BitWidth = VT.getSizeInBits();
switch (Opcode) {
default: break;
case ISD::SIGN_EXTEND:
unsigned OpOpcode = Operand.Val->getOpcode();
switch (Opcode) {
case ISD::TokenFactor:
- return Operand; // Factor of one node? No factor.
+ case ISD::MERGE_VALUES:
+ return Operand; // Factor or merge of one node? No need.
case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
case ISD::FP_EXTEND:
- assert(MVT::isFloatingPoint(VT) &&
- MVT::isFloatingPoint(Operand.getValueType()) && "Invalid FP cast!");
+ assert(VT.isFloatingPoint() &&
+ Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
if (Operand.getValueType() == VT) return Operand; // noop conversion.
if (Operand.getOpcode() == ISD::UNDEF)
return getNode(ISD::UNDEF, VT);
break;
case ISD::SIGN_EXTEND:
- assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ assert(VT.isInteger() && Operand.getValueType().isInteger() &&
"Invalid SIGN_EXTEND!");
if (Operand.getValueType() == VT) return Operand; // noop extension
- assert(MVT::getSizeInBits(Operand.getValueType()) < MVT::getSizeInBits(VT)
+ assert(Operand.getValueType().bitsLT(VT)
&& "Invalid sext node, dst < src!");
if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
break;
case ISD::ZERO_EXTEND:
- assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ assert(VT.isInteger() && Operand.getValueType().isInteger() &&
"Invalid ZERO_EXTEND!");
if (Operand.getValueType() == VT) return Operand; // noop extension
- assert(MVT::getSizeInBits(Operand.getValueType()) < MVT::getSizeInBits(VT)
+ assert(Operand.getValueType().bitsLT(VT)
&& "Invalid zext node, dst < src!");
if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
break;
case ISD::ANY_EXTEND:
- assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ assert(VT.isInteger() && Operand.getValueType().isInteger() &&
"Invalid ANY_EXTEND!");
if (Operand.getValueType() == VT) return Operand; // noop extension
- assert(MVT::getSizeInBits(Operand.getValueType()) < MVT::getSizeInBits(VT)
+ assert(Operand.getValueType().bitsLT(VT)
&& "Invalid anyext node, dst < src!");
if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
// (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
break;
case ISD::TRUNCATE:
- assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ assert(VT.isInteger() && Operand.getValueType().isInteger() &&
"Invalid TRUNCATE!");
if (Operand.getValueType() == VT) return Operand; // noop truncate
- assert(MVT::getSizeInBits(Operand.getValueType()) > MVT::getSizeInBits(VT)
+ assert(Operand.getValueType().bitsGT(VT)
&& "Invalid truncate node, src < dst!");
if (OpOpcode == ISD::TRUNCATE)
return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
OpOpcode == ISD::ANY_EXTEND) {
// If the source is smaller than the dest, we still need an extend.
- if (MVT::getSizeInBits(Operand.Val->getOperand(0).getValueType())
- < MVT::getSizeInBits(VT))
+ if (Operand.Val->getOperand(0).getValueType().bitsLT(VT))
return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
- else if (MVT::getSizeInBits(Operand.Val->getOperand(0).getValueType())
- > MVT::getSizeInBits(VT))
+ else if (Operand.Val->getOperand(0).getValueType().bitsGT(VT))
return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
else
return Operand.Val->getOperand(0);
break;
case ISD::BIT_CONVERT:
// Basic sanity checking.
- assert(MVT::getSizeInBits(VT) == MVT::getSizeInBits(Operand.getValueType())
+ assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
&& "Cannot BIT_CONVERT between types of different sizes!");
if (VT == Operand.getValueType()) return Operand; // noop conversion.
if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
return getNode(ISD::UNDEF, VT);
break;
case ISD::SCALAR_TO_VECTOR:
- assert(MVT::isVector(VT) && !MVT::isVector(Operand.getValueType()) &&
- MVT::getVectorElementType(VT) == Operand.getValueType() &&
+ assert(VT.isVector() && !Operand.getValueType().isVector() &&
+ VT.getVectorElementType() == Operand.getValueType() &&
"Illegal SCALAR_TO_VECTOR node!");
if (OpOpcode == ISD::UNDEF)
return getNode(ISD::UNDEF, VT);
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
SDOperand N1, SDOperand N2) {
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
if (N2.getOpcode() == ISD::EntryToken) return N1;
break;
case ISD::AND:
- assert(MVT::isInteger(VT) && N1.getValueType() == N2.getValueType() &&
+ assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
N1.getValueType() == VT && "Binary operator types must match!");
// (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
// worth handling here.
break;
case ISD::OR:
case ISD::XOR:
- assert(MVT::isInteger(VT) && N1.getValueType() == N2.getValueType() &&
+ case ISD::ADD:
+ case ISD::SUB:
+ assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
N1.getValueType() == VT && "Binary operator types must match!");
- // (X ^| 0) -> X. This commonly occurs when legalizing i64 values, so it's
- // worth handling here.
+ // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
+ // it's worth handling here.
if (N2C && N2C->isNullValue())
return N1;
break;
case ISD::UREM:
case ISD::MULHU:
case ISD::MULHS:
- assert(MVT::isInteger(VT) && "This operator does not apply to FP types!");
+ assert(VT.isInteger() && "This operator does not apply to FP types!");
// fall through
- case ISD::ADD:
- case ISD::SUB:
case ISD::MUL:
case ISD::SDIV:
case ISD::SREM:
break;
case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
assert(N1.getValueType() == VT &&
- MVT::isFloatingPoint(N1.getValueType()) &&
- MVT::isFloatingPoint(N2.getValueType()) &&
+ N1.getValueType().isFloatingPoint() &&
+ N2.getValueType().isFloatingPoint() &&
"Invalid FCOPYSIGN!");
break;
case ISD::SHL:
case ISD::ROTR:
assert(VT == N1.getValueType() &&
"Shift operators return type must be the same as their first arg");
- assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) &&
+ assert(VT.isInteger() && N2.getValueType().isInteger() &&
VT != MVT::i1 && "Shifts only work on integers");
break;
case ISD::FP_ROUND_INREG: {
- MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
+ MVT EVT = cast<VTSDNode>(N2)->getVT();
assert(VT == N1.getValueType() && "Not an inreg round!");
- assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) &&
+ assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
"Cannot FP_ROUND_INREG integer types");
- assert(MVT::getSizeInBits(EVT) <= MVT::getSizeInBits(VT) &&
- "Not rounding down!");
+ assert(EVT.bitsLE(VT) && "Not rounding down!");
if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
break;
}
case ISD::FP_ROUND:
- assert(MVT::isFloatingPoint(VT) &&
- MVT::isFloatingPoint(N1.getValueType()) &&
- MVT::getSizeInBits(VT) <= MVT::getSizeInBits(N1.getValueType()) &&
+ assert(VT.isFloatingPoint() &&
+ N1.getValueType().isFloatingPoint() &&
+ VT.bitsLE(N1.getValueType()) &&
isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
if (N1.getValueType() == VT) return N1; // noop conversion.
break;
case ISD::AssertSext:
case ISD::AssertZext: {
- MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
+ MVT EVT = cast<VTSDNode>(N2)->getVT();
assert(VT == N1.getValueType() && "Not an inreg extend!");
- assert(MVT::isInteger(VT) && MVT::isInteger(EVT) &&
+ assert(VT.isInteger() && EVT.isInteger() &&
"Cannot *_EXTEND_INREG FP types");
- assert(MVT::getSizeInBits(EVT) <= MVT::getSizeInBits(VT) &&
- "Not extending!");
+ assert(EVT.bitsLE(VT) && "Not extending!");
if (VT == EVT) return N1; // noop assertion.
break;
}
case ISD::SIGN_EXTEND_INREG: {
- MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
+ MVT EVT = cast<VTSDNode>(N2)->getVT();
assert(VT == N1.getValueType() && "Not an inreg extend!");
- assert(MVT::isInteger(VT) && MVT::isInteger(EVT) &&
+ assert(VT.isInteger() && EVT.isInteger() &&
"Cannot *_EXTEND_INREG FP types");
- assert(MVT::getSizeInBits(EVT) <= MVT::getSizeInBits(VT) &&
- "Not extending!");
+ assert(EVT.bitsLE(VT) && "Not extending!");
if (EVT == VT) return N1; // Not actually extending
if (N1C) {
APInt Val = N1C->getAPIntValue();
- unsigned FromBits = MVT::getSizeInBits(cast<VTSDNode>(N2)->getVT());
+ unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
Val <<= Val.getBitWidth()-FromBits;
Val = Val.ashr(Val.getBitWidth()-FromBits);
return getConstant(Val, VT);
if (N1.getOpcode() == ISD::CONCAT_VECTORS &&
N1.getNumOperands() > 0) {
unsigned Factor =
- MVT::getVectorNumElements(N1.getOperand(0).getValueType());
+ N1.getOperand(0).getValueType().getVectorNumElements();
return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
N1.getOperand(N2C->getValue() / Factor),
getConstant(N2C->getValue() % Factor, N2.getValueType()));
break;
case ISD::EXTRACT_ELEMENT:
assert(N2C && (unsigned)N2C->getValue() < 2 && "Bad EXTRACT_ELEMENT!");
- assert(!MVT::isVector(N1.getValueType()) &&
- MVT::isInteger(N1.getValueType()) &&
- !MVT::isVector(VT) && MVT::isInteger(VT) &&
+ assert(!N1.getValueType().isVector() &&
+ N1.getValueType().isInteger() &&
+ !VT.isVector() && VT.isInteger() &&
"EXTRACT_ELEMENT only applies to integers!");
// EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
// EXTRACT_ELEMENT of a constant int is also very common.
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
- unsigned ElementSize = MVT::getSizeInBits(VT);
+ unsigned ElementSize = VT.getSizeInBits();
unsigned Shift = ElementSize * N2C->getValue();
APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
return getConstant(ShiftedVal.trunc(ElementSize), VT);
case ISD::SREM:
case ISD::SRL:
case ISD::SHL:
- if (!MVT::isVector(VT))
+ if (!VT.isVector())
return getConstant(0, VT); // fold op(undef, arg2) -> 0
// For vectors, we can't easily build an all zero vector, just return
// the LHS.
case ISD::AND:
case ISD::SRL:
case ISD::SHL:
- if (!MVT::isVector(VT))
+ if (!VT.isVector())
return getConstant(0, VT); // fold op(arg1, undef) -> 0
// For vectors, we can't easily build an all zero vector, just return
// the LHS.
return N1;
case ISD::OR:
- if (!MVT::isVector(VT))
- return getConstant(MVT::getIntVTBitMask(VT), VT);
+ if (!VT.isVector())
+ return getConstant(VT.getIntegerVTBitMask(), VT);
// For vectors, we can't easily build an all one vector, just return
// the LHS.
return N1;
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
SDOperand N1, SDOperand N2, SDOperand N3) {
// Perform various simplifications.
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
break;
case ISD::VECTOR_SHUFFLE:
assert(VT == N1.getValueType() && VT == N2.getValueType() &&
- MVT::isVector(VT) && MVT::isVector(N3.getValueType()) &&
+ VT.isVector() && N3.getValueType().isVector() &&
N3.getOpcode() == ISD::BUILD_VECTOR &&
- MVT::getVectorNumElements(VT) == N3.getNumOperands() &&
+ VT.getVectorNumElements() == N3.getNumOperands() &&
"Illegal VECTOR_SHUFFLE node!");
break;
case ISD::BIT_CONVERT:
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
SDOperand N1, SDOperand N2, SDOperand N3,
SDOperand N4) {
SDOperand Ops[] = { N1, N2, N3, N4 };
return getNode(Opcode, VT, Ops, 4);
}
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
SDOperand N1, SDOperand N2, SDOperand N3,
SDOperand N4, SDOperand N5) {
SDOperand Ops[] = { N1, N2, N3, N4, N5 };
/// getMemsetValue - Vectorized representation of the memset value
/// operand.
-static SDOperand getMemsetValue(SDOperand Value, MVT::ValueType VT,
- SelectionDAG &DAG) {
- MVT::ValueType CurVT = VT;
+static SDOperand getMemsetValue(SDOperand Value, MVT VT, SelectionDAG &DAG) {
+ unsigned NumBits = VT.isVector() ?
+ VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
- uint64_t Val = C->getValue() & 255;
+ APInt Val = APInt(NumBits, C->getValue() & 255);
unsigned Shift = 8;
- while (CurVT != MVT::i8) {
+ for (unsigned i = NumBits; i > 8; i >>= 1) {
Val = (Val << Shift) | Val;
Shift <<= 1;
- CurVT = (MVT::ValueType)((unsigned)CurVT - 1);
- }
- return DAG.getConstant(Val, VT);
- } else {
- Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
- unsigned Shift = 8;
- while (CurVT != MVT::i8) {
- Value =
- DAG.getNode(ISD::OR, VT,
- DAG.getNode(ISD::SHL, VT, Value,
- DAG.getConstant(Shift, MVT::i8)), Value);
- Shift <<= 1;
- CurVT = (MVT::ValueType)((unsigned)CurVT - 1);
}
+ if (VT.isInteger())
+ return DAG.getConstant(Val, VT);
+ return DAG.getConstantFP(APFloat(Val), VT);
+ }
- return Value;
+ Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
+ unsigned Shift = 8;
+ for (unsigned i = NumBits; i > 8; i >>= 1) {
+ Value = DAG.getNode(ISD::OR, VT,
+ DAG.getNode(ISD::SHL, VT, Value,
+ DAG.getConstant(Shift, MVT::i8)), Value);
+ Shift <<= 1;
}
+
+ return Value;
}
/// getMemsetStringVal - Similar to getMemsetValue. Except this is only
/// used when a memcpy is turned into a memset when the source is a constant
/// string ptr.
-static SDOperand getMemsetStringVal(MVT::ValueType VT,
- SelectionDAG &DAG,
+static SDOperand getMemsetStringVal(MVT VT, SelectionDAG &DAG,
const TargetLowering &TLI,
std::string &Str, unsigned Offset) {
+ assert(!VT.isVector() && "Can't handle vector type here!");
+ unsigned NumBits = VT.getSizeInBits();
+ unsigned MSB = NumBits / 8;
uint64_t Val = 0;
- unsigned MSB = MVT::getSizeInBits(VT) / 8;
if (TLI.isLittleEndian())
Offset = Offset + MSB - 1;
for (unsigned i = 0; i != MSB; ++i) {
}
/// getMemBasePlusOffset - Returns base and offset node for the
+///
static SDOperand getMemBasePlusOffset(SDOperand Base, unsigned Offset,
SelectionDAG &DAG) {
- MVT::ValueType VT = Base.getValueType();
+ MVT VT = Base.getValueType();
return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
}
+/// isMemSrcFromString - Returns true if memcpy source is a string constant.
+///
+static bool isMemSrcFromString(SDOperand Src, std::string &Str,
+ uint64_t &SrcOff) {
+ unsigned SrcDelta = 0;
+ GlobalAddressSDNode *G = NULL;
+ if (Src.getOpcode() == ISD::GlobalAddress)
+ G = cast<GlobalAddressSDNode>(Src);
+ else if (Src.getOpcode() == ISD::ADD &&
+ Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
+ Src.getOperand(1).getOpcode() == ISD::Constant) {
+ G = cast<GlobalAddressSDNode>(Src.getOperand(0));
+ SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getValue();
+ }
+ if (!G)
+ return false;
+
+ GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
+ if (GV && GV->isConstant()) {
+ Str = GV->getStringValue(false);
+ if (!Str.empty()) {
+ SrcOff += SrcDelta;
+ return true;
+ }
+ }
+
+ return false;
+}
+
/// MeetsMaxMemopRequirement - Determines if the number of memory ops required
/// to replace the memset / memcpy is below the threshold. It also returns the
/// types of the sequence of memory ops to perform memset / memcpy.
-static bool MeetsMaxMemopRequirement(std::vector<MVT::ValueType> &MemOps,
- unsigned Limit, uint64_t Size,
- unsigned Align,
- const TargetLowering &TLI) {
- MVT::ValueType VT;
-
- if (TLI.allowsUnalignedMemoryAccesses()) {
- VT = MVT::i64;
- } else {
- switch (Align & 7) {
- case 0:
- VT = MVT::i64;
- break;
- case 4:
- VT = MVT::i32;
- break;
- case 2:
- VT = MVT::i16;
- break;
- default:
- VT = MVT::i8;
- break;
+static
+bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
+ SDOperand Dst, SDOperand Src,
+ unsigned Limit, uint64_t Size, unsigned &Align,
+ SelectionDAG &DAG,
+ const TargetLowering &TLI) {
+ bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
+
+ std::string Str;
+ uint64_t SrcOff = 0;
+ bool isSrcStr = isMemSrcFromString(Src, Str, SrcOff);
+ bool isSrcConst = isa<ConstantSDNode>(Src);
+ MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
+ if (VT != MVT::iAny) {
+ unsigned NewAlign = (unsigned)
+ TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
+ // If source is a string constant, this will require an unaligned load.
+ if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
+ if (Dst.getOpcode() != ISD::FrameIndex) {
+ // Can't change destination alignment. It requires a unaligned store.
+ if (AllowUnalign)
+ VT = MVT::iAny;
+ } else {
+ int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
+ MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
+ if (MFI->isFixedObjectIndex(FI)) {
+ // Can't change destination alignment. It requires a unaligned store.
+ if (AllowUnalign)
+ VT = MVT::iAny;
+ } else {
+ // Give the stack frame object a larger alignment if needed.
+ if (MFI->getObjectAlignment(FI) < NewAlign)
+ MFI->setObjectAlignment(FI, NewAlign);
+ Align = NewAlign;
+ }
+ }
}
}
- MVT::ValueType LVT = MVT::i64;
- while (!TLI.isTypeLegal(LVT))
- LVT = (MVT::ValueType)((unsigned)LVT - 1);
- assert(MVT::isInteger(LVT));
+ if (VT == MVT::iAny) {
+ if (AllowUnalign) {
+ VT = MVT::i64;
+ } else {
+ switch (Align & 7) {
+ case 0: VT = MVT::i64; break;
+ case 4: VT = MVT::i32; break;
+ case 2: VT = MVT::i16; break;
+ default: VT = MVT::i8; break;
+ }
+ }
+
+ MVT LVT = MVT::i64;
+ while (!TLI.isTypeLegal(LVT))
+ LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
+ assert(LVT.isInteger());
- if (VT > LVT)
- VT = LVT;
+ if (VT.bitsGT(LVT))
+ VT = LVT;
+ }
unsigned NumMemOps = 0;
while (Size != 0) {
- unsigned VTSize = MVT::getSizeInBits(VT) / 8;
+ unsigned VTSize = VT.getSizeInBits() / 8;
while (VTSize > Size) {
- VT = (MVT::ValueType)((unsigned)VT - 1);
- VTSize >>= 1;
+ // For now, only use non-vector load / store's for the left-over pieces.
+ if (VT.isVector()) {
+ VT = MVT::i64;
+ while (!TLI.isTypeLegal(VT))
+ VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
+ VTSize = VT.getSizeInBits() / 8;
+ } else {
+ VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
+ VTSize >>= 1;
+ }
}
- assert(MVT::isInteger(VT));
if (++NumMemOps > Limit)
return false;
static SDOperand getMemcpyLoadsAndStores(SelectionDAG &DAG,
SDOperand Chain, SDOperand Dst,
SDOperand Src, uint64_t Size,
- unsigned Align,
- bool AlwaysInline,
- Value *DstSV, uint64_t DstOff,
- Value *SrcSV, uint64_t SrcOff) {
+ unsigned Align, bool AlwaysInline,
+ const Value *DstSV, uint64_t DstSVOff,
+ const Value *SrcSV, uint64_t SrcSVOff){
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
- // Expand memcpy to a series of store ops if the size operand falls below
- // a certain threshold.
- std::vector<MVT::ValueType> MemOps;
+ // Expand memcpy to a series of load and store ops if the size operand falls
+ // below a certain threshold.
+ std::vector<MVT> MemOps;
uint64_t Limit = -1;
if (!AlwaysInline)
Limit = TLI.getMaxStoresPerMemcpy();
- if (!MeetsMaxMemopRequirement(MemOps, Limit, Size, Align, TLI))
+ unsigned DstAlign = Align; // Destination alignment can change.
+ if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
+ DAG, TLI))
return SDOperand();
- SmallVector<SDOperand, 8> OutChains;
-
- unsigned NumMemOps = MemOps.size();
- unsigned SrcDelta = 0;
- GlobalAddressSDNode *G = NULL;
std::string Str;
- bool CopyFromStr = false;
-
- if (Src.getOpcode() == ISD::GlobalAddress)
- G = cast<GlobalAddressSDNode>(Src);
- else if (Src.getOpcode() == ISD::ADD &&
- Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
- Src.getOperand(1).getOpcode() == ISD::Constant) {
- G = cast<GlobalAddressSDNode>(Src.getOperand(0));
- SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getValue();
- }
- if (G) {
- GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
- if (GV && GV->isConstant()) {
- Str = GV->getStringValue(false);
- if (!Str.empty()) {
- CopyFromStr = true;
- SrcOff += SrcDelta;
- }
- }
- }
+ uint64_t SrcOff = 0, DstOff = 0;
+ bool CopyFromStr = isMemSrcFromString(Src, Str, SrcOff);
+ SmallVector<SDOperand, 8> OutChains;
+ unsigned NumMemOps = MemOps.size();
for (unsigned i = 0; i < NumMemOps; i++) {
- MVT::ValueType VT = MemOps[i];
- unsigned VTSize = MVT::getSizeInBits(VT) / 8;
+ MVT VT = MemOps[i];
+ unsigned VTSize = VT.getSizeInBits() / 8;
SDOperand Value, Store;
- if (CopyFromStr) {
+ if (CopyFromStr && !VT.isVector()) {
+ // It's unlikely a store of a vector immediate can be done in a single
+ // instruction. It would require a load from a constantpool first.
+ // FIXME: Handle cases where store of vector immediate is done in a
+ // single instruction.
Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
- Store =
- DAG.getStore(Chain, Value,
- getMemBasePlusOffset(Dst, DstOff, DAG),
- DstSV, DstOff);
+ Store = DAG.getStore(Chain, Value,
+ getMemBasePlusOffset(Dst, DstOff, DAG),
+ DstSV, DstSVOff + DstOff);
} else {
Value = DAG.getLoad(VT, Chain,
getMemBasePlusOffset(Src, SrcOff, DAG),
- SrcSV, SrcOff, false, Align);
- Store =
- DAG.getStore(Chain, Value,
- getMemBasePlusOffset(Dst, DstOff, DAG),
- DstSV, DstOff, false, Align);
+ SrcSV, SrcSVOff + SrcOff, false, Align);
+ Store = DAG.getStore(Chain, Value,
+ getMemBasePlusOffset(Dst, DstOff, DAG),
+ DstSV, DstSVOff + DstOff, false, DstAlign);
}
OutChains.push_back(Store);
SrcOff += VTSize;
&OutChains[0], OutChains.size());
}
+static SDOperand getMemmoveLoadsAndStores(SelectionDAG &DAG,
+ SDOperand Chain, SDOperand Dst,
+ SDOperand Src, uint64_t Size,
+ unsigned Align, bool AlwaysInline,
+ const Value *DstSV, uint64_t DstSVOff,
+ const Value *SrcSV, uint64_t SrcSVOff){
+ const TargetLowering &TLI = DAG.getTargetLoweringInfo();
+
+ // Expand memmove to a series of load and store ops if the size operand falls
+ // below a certain threshold.
+ std::vector<MVT> MemOps;
+ uint64_t Limit = -1;
+ if (!AlwaysInline)
+ Limit = TLI.getMaxStoresPerMemmove();
+ unsigned DstAlign = Align; // Destination alignment can change.
+ if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
+ DAG, TLI))
+ return SDOperand();
+
+ uint64_t SrcOff = 0, DstOff = 0;
+
+ SmallVector<SDOperand, 8> LoadValues;
+ SmallVector<SDOperand, 8> LoadChains;
+ SmallVector<SDOperand, 8> OutChains;
+ unsigned NumMemOps = MemOps.size();
+ for (unsigned i = 0; i < NumMemOps; i++) {
+ MVT VT = MemOps[i];
+ unsigned VTSize = VT.getSizeInBits() / 8;
+ SDOperand Value, Store;
+
+ Value = DAG.getLoad(VT, Chain,
+ getMemBasePlusOffset(Src, SrcOff, DAG),
+ SrcSV, SrcSVOff + SrcOff, false, Align);
+ LoadValues.push_back(Value);
+ LoadChains.push_back(Value.getValue(1));
+ SrcOff += VTSize;
+ }
+ Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
+ &LoadChains[0], LoadChains.size());
+ OutChains.clear();
+ for (unsigned i = 0; i < NumMemOps; i++) {
+ MVT VT = MemOps[i];
+ unsigned VTSize = VT.getSizeInBits() / 8;
+ SDOperand Value, Store;
+
+ Store = DAG.getStore(Chain, LoadValues[i],
+ getMemBasePlusOffset(Dst, DstOff, DAG),
+ DstSV, DstSVOff + DstOff, false, DstAlign);
+ OutChains.push_back(Store);
+ DstOff += VTSize;
+ }
+
+ return DAG.getNode(ISD::TokenFactor, MVT::Other,
+ &OutChains[0], OutChains.size());
+}
+
static SDOperand getMemsetStores(SelectionDAG &DAG,
SDOperand Chain, SDOperand Dst,
SDOperand Src, uint64_t Size,
unsigned Align,
- Value *DstSV, uint64_t DstOff) {
+ const Value *DstSV, uint64_t DstSVOff) {
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
// Expand memset to a series of load/store ops if the size operand
// falls below a certain threshold.
- std::vector<MVT::ValueType> MemOps;
- if (!MeetsMaxMemopRequirement(MemOps, TLI.getMaxStoresPerMemset(),
- Size, Align, TLI))
+ std::vector<MVT> MemOps;
+ if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
+ Size, Align, DAG, TLI))
return SDOperand();
SmallVector<SDOperand, 8> OutChains;
+ uint64_t DstOff = 0;
unsigned NumMemOps = MemOps.size();
for (unsigned i = 0; i < NumMemOps; i++) {
- MVT::ValueType VT = MemOps[i];
- unsigned VTSize = MVT::getSizeInBits(VT) / 8;
+ MVT VT = MemOps[i];
+ unsigned VTSize = VT.getSizeInBits() / 8;
SDOperand Value = getMemsetValue(Src, VT, DAG);
SDOperand Store = DAG.getStore(Chain, Value,
getMemBasePlusOffset(Dst, DstOff, DAG),
- DstSV, DstOff);
+ DstSV, DstSVOff + DstOff);
OutChains.push_back(Store);
DstOff += VTSize;
}
SDOperand SelectionDAG::getMemcpy(SDOperand Chain, SDOperand Dst,
SDOperand Src, SDOperand Size,
unsigned Align, bool AlwaysInline,
- Value *DstSV, uint64_t DstOff,
- Value *SrcSV, uint64_t SrcOff) {
+ const Value *DstSV, uint64_t DstSVOff,
+ const Value *SrcSV, uint64_t SrcSVOff) {
// Check to see if we should lower the memcpy to loads and stores first.
// For cases within the target-specified limits, this is the best choice.
SDOperand Result =
getMemcpyLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(),
- Align, false, DstSV, DstOff, SrcSV, SrcOff);
+ Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
if (Result.Val)
return Result;
}
SDOperand Result =
TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
AlwaysInline,
- DstSV, DstOff, SrcSV, SrcOff);
+ DstSV, DstSVOff, SrcSV, SrcSVOff);
if (Result.Val)
return Result;
assert(ConstantSize && "AlwaysInline requires a constant size!");
return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
ConstantSize->getValue(), Align, true,
- DstSV, DstOff, SrcSV, SrcOff);
+ DstSV, DstSVOff, SrcSV, SrcSVOff);
}
// Emit a library call.
SDOperand SelectionDAG::getMemmove(SDOperand Chain, SDOperand Dst,
SDOperand Src, SDOperand Size,
unsigned Align,
- Value *DstSV, uint64_t DstOff,
- Value *SrcSV, uint64_t SrcOff) {
+ const Value *DstSV, uint64_t DstSVOff,
+ const Value *SrcSV, uint64_t SrcSVOff) {
- // TODO: Optimize small memmove cases with simple loads and stores,
- // ensuring that all loads precede all stores. This can cause severe
- // register pressure, so targets should be careful with the size limit.
+ // Check to see if we should lower the memmove to loads and stores first.
+ // For cases within the target-specified limits, this is the best choice.
+ ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
+ if (ConstantSize) {
+ // Memmove with size zero? Just return the original chain.
+ if (ConstantSize->isNullValue())
+ return Chain;
+
+ SDOperand Result =
+ getMemmoveLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(),
+ Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
+ if (Result.Val)
+ return Result;
+ }
// Then check to see if we should lower the memmove with target-specific
// code. If the target chooses to do this, this is the next best.
SDOperand Result =
TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
- DstSV, DstOff, SrcSV, SrcOff);
+ DstSV, DstSVOff, SrcSV, SrcSVOff);
if (Result.Val)
return Result;
SDOperand SelectionDAG::getMemset(SDOperand Chain, SDOperand Dst,
SDOperand Src, SDOperand Size,
unsigned Align,
- Value *DstSV, uint64_t DstOff) {
+ const Value *DstSV, uint64_t DstSVOff) {
// Check to see if we should lower the memset to stores first.
// For cases within the target-specified limits, this is the best choice.
SDOperand Result =
getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align,
- DstSV, DstOff);
+ DstSV, DstSVOff);
if (Result.Val)
return Result;
}
// code. If the target chooses to do this, this is the next best.
SDOperand Result =
TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
- DstSV, DstOff);
+ DstSV, DstSVOff);
if (Result.Val)
return Result;
Entry.Node = Dst; Entry.Ty = IntPtrTy;
Args.push_back(Entry);
// Extend or truncate the argument to be an i32 value for the call.
- if (Src.getValueType() > MVT::i32)
+ if (Src.getValueType().bitsGT(MVT::i32))
Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
else
Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain,
SDOperand Ptr, SDOperand Cmp,
- SDOperand Swp, MVT::ValueType VT) {
+ SDOperand Swp, MVT VT) {
assert(Opcode == ISD::ATOMIC_LCS && "Invalid Atomic Op");
assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
SDVTList VTs = getVTList(Cmp.getValueType(), MVT::Other);
FoldingSetNodeID ID;
SDOperand Ops[] = {Chain, Ptr, Cmp, Swp};
AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
- ID.AddInteger((unsigned int)VT);
+ ID.AddInteger(VT.getRawBits());
void* IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain,
SDOperand Ptr, SDOperand Val,
- MVT::ValueType VT) {
- assert((Opcode == ISD::ATOMIC_LAS || Opcode == ISD::ATOMIC_SWAP)
+ MVT VT) {
+ assert(( Opcode == ISD::ATOMIC_LAS || Opcode == ISD::ATOMIC_LSS
+ || Opcode == ISD::ATOMIC_SWAP || Opcode == ISD::ATOMIC_LOAD_AND
+ || Opcode == ISD::ATOMIC_LOAD_OR || Opcode == ISD::ATOMIC_LOAD_XOR
+ || Opcode == ISD::ATOMIC_LOAD_NAND
+ || Opcode == ISD::ATOMIC_LOAD_MIN || Opcode == ISD::ATOMIC_LOAD_MAX
+ || Opcode == ISD::ATOMIC_LOAD_UMIN || Opcode == ISD::ATOMIC_LOAD_UMAX)
&& "Invalid Atomic Op");
SDVTList VTs = getVTList(Val.getValueType(), MVT::Other);
FoldingSetNodeID ID;
SDOperand Ops[] = {Chain, Ptr, Val};
AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
- ID.AddInteger((unsigned int)VT);
+ ID.AddInteger(VT.getRawBits());
void* IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDOperand(E, 0);
SDOperand
SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
- MVT::ValueType VT, SDOperand Chain,
+ MVT VT, SDOperand Chain,
SDOperand Ptr, SDOperand Offset,
- const Value *SV, int SVOffset, MVT::ValueType EVT,
+ const Value *SV, int SVOffset, MVT EVT,
bool isVolatile, unsigned Alignment) {
if (Alignment == 0) { // Ensure that codegen never sees alignment 0
const Type *Ty = 0;
if (VT != MVT::iPTR) {
- Ty = MVT::getTypeForValueType(VT);
+ Ty = VT.getTypeForMVT();
} else if (SV) {
const PointerType *PT = dyn_cast<PointerType>(SV->getType());
assert(PT && "Value for load must be a pointer");
assert(VT == EVT && "Non-extending load from different memory type!");
} else {
// Extending load.
- if (MVT::isVector(VT))
- assert(EVT == MVT::getVectorElementType(VT) && "Invalid vector extload!");
+ if (VT.isVector())
+ assert(EVT == VT.getVectorElementType() && "Invalid vector extload!");
else
- assert(MVT::getSizeInBits(EVT) < MVT::getSizeInBits(VT) &&
+ assert(EVT.bitsLT(VT) &&
"Should only be an extending load, not truncating!");
- assert((ExtType == ISD::EXTLOAD || MVT::isInteger(VT)) &&
+ assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
"Cannot sign/zero extend a FP/Vector load!");
- assert(MVT::isInteger(VT) == MVT::isInteger(EVT) &&
+ assert(VT.isInteger() == EVT.isInteger() &&
"Cannot convert from FP to Int or Int -> FP!");
}
bool Indexed = AM != ISD::UNINDEXED;
- assert(Indexed || Offset.getOpcode() == ISD::UNDEF &&
+ assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
"Unindexed load with an offset!");
SDVTList VTs = Indexed ?
AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
ID.AddInteger(AM);
ID.AddInteger(ExtType);
- ID.AddInteger((unsigned int)EVT);
+ ID.AddInteger(EVT.getRawBits());
ID.AddInteger(Alignment);
ID.AddInteger(isVolatile);
void *IP = 0;
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
+SDOperand SelectionDAG::getLoad(MVT VT,
SDOperand Chain, SDOperand Ptr,
const Value *SV, int SVOffset,
bool isVolatile, unsigned Alignment) {
SV, SVOffset, VT, isVolatile, Alignment);
}
-SDOperand SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT::ValueType VT,
+SDOperand SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
SDOperand Chain, SDOperand Ptr,
const Value *SV,
- int SVOffset, MVT::ValueType EVT,
+ int SVOffset, MVT EVT,
bool isVolatile, unsigned Alignment) {
SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
SDOperand SelectionDAG::getStore(SDOperand Chain, SDOperand Val,
SDOperand Ptr, const Value *SV, int SVOffset,
bool isVolatile, unsigned Alignment) {
- MVT::ValueType VT = Val.getValueType();
+ MVT VT = Val.getValueType();
if (Alignment == 0) { // Ensure that codegen never sees alignment 0
const Type *Ty = 0;
if (VT != MVT::iPTR) {
- Ty = MVT::getTypeForValueType(VT);
+ Ty = VT.getTypeForMVT();
} else if (SV) {
const PointerType *PT = dyn_cast<PointerType>(SV->getType());
assert(PT && "Value for store must be a pointer");
AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
ID.AddInteger(ISD::UNINDEXED);
ID.AddInteger(false);
- ID.AddInteger((unsigned int)VT);
+ ID.AddInteger(VT.getRawBits());
ID.AddInteger(Alignment);
ID.AddInteger(isVolatile);
void *IP = 0;
SDOperand SelectionDAG::getTruncStore(SDOperand Chain, SDOperand Val,
SDOperand Ptr, const Value *SV,
- int SVOffset, MVT::ValueType SVT,
+ int SVOffset, MVT SVT,
bool isVolatile, unsigned Alignment) {
- MVT::ValueType VT = Val.getValueType();
+ MVT VT = Val.getValueType();
if (VT == SVT)
return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
- assert(MVT::getSizeInBits(VT) > MVT::getSizeInBits(SVT) &&
- "Not a truncation?");
- assert(MVT::isInteger(VT) == MVT::isInteger(SVT) &&
+ assert(VT.bitsGT(SVT) && "Not a truncation?");
+ assert(VT.isInteger() == SVT.isInteger() &&
"Can't do FP-INT conversion!");
if (Alignment == 0) { // Ensure that codegen never sees alignment 0
const Type *Ty = 0;
if (VT != MVT::iPTR) {
- Ty = MVT::getTypeForValueType(VT);
+ Ty = VT.getTypeForMVT();
} else if (SV) {
const PointerType *PT = dyn_cast<PointerType>(SV->getType());
assert(PT && "Value for store must be a pointer");
AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
ID.AddInteger(ISD::UNINDEXED);
ID.AddInteger(1);
- ID.AddInteger((unsigned int)SVT);
+ ID.AddInteger(SVT.getRawBits());
ID.AddInteger(Alignment);
ID.AddInteger(isVolatile);
void *IP = 0;
AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
ID.AddInteger(AM);
ID.AddInteger(ST->isTruncatingStore());
- ID.AddInteger((unsigned int)(ST->getMemoryVT()));
+ ID.AddInteger(ST->getMemoryVT().getRawBits());
ID.AddInteger(ST->getAlignment());
ID.AddInteger(ST->isVolatile());
void *IP = 0;
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getVAArg(MVT::ValueType VT,
+SDOperand SelectionDAG::getVAArg(MVT VT,
SDOperand Chain, SDOperand Ptr,
SDOperand SV) {
SDOperand Ops[] = { Chain, Ptr, SV };
return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
}
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
- const SDOperand *Ops, unsigned NumOps) {
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
+ SDOperandPtr Ops, unsigned NumOps) {
switch (NumOps) {
case 0: return getNode(Opcode, VT);
case 1: return getNode(Opcode, VT, Ops[0]);
}
SDOperand SelectionDAG::getNode(unsigned Opcode,
- std::vector<MVT::ValueType> &ResultTys,
- const SDOperand *Ops, unsigned NumOps) {
+ std::vector<MVT> &ResultTys,
+ SDOperandPtr Ops, unsigned NumOps) {
return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
Ops, NumOps);
}
SDOperand SelectionDAG::getNode(unsigned Opcode,
- const MVT::ValueType *VTs, unsigned NumVTs,
- const SDOperand *Ops, unsigned NumOps) {
+ const MVT *VTs, unsigned NumVTs,
+ SDOperandPtr Ops, unsigned NumOps) {
if (NumVTs == 1)
return getNode(Opcode, VTs[0], Ops, NumOps);
return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
}
SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
- const SDOperand *Ops, unsigned NumOps) {
+ SDOperandPtr Ops, unsigned NumOps) {
if (VTList.NumVTs == 1)
return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
// If the and is only masking out bits that cannot effect the shift,
// eliminate the and.
- unsigned NumBits = MVT::getSizeInBits(VT)*2;
+ unsigned NumBits = VT.getSizeInBits()*2;
if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
}
}
SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
- return getNode(Opcode, VTList, 0, 0);
+ return getNode(Opcode, VTList, (SDOperand*)0, 0);
}
SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
return getNode(Opcode, VTList, Ops, 5);
}
-SDVTList SelectionDAG::getVTList(MVT::ValueType VT) {
+SDVTList SelectionDAG::getVTList(MVT VT) {
return makeVTList(SDNode::getValueTypeList(VT), 1);
}
-SDVTList SelectionDAG::getVTList(MVT::ValueType VT1, MVT::ValueType VT2) {
- for (std::list<std::vector<MVT::ValueType> >::iterator I = VTList.begin(),
+SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
+ for (std::list<std::vector<MVT> >::iterator I = VTList.begin(),
E = VTList.end(); I != E; ++I) {
if (I->size() == 2 && (*I)[0] == VT1 && (*I)[1] == VT2)
return makeVTList(&(*I)[0], 2);
}
- std::vector<MVT::ValueType> V;
+ std::vector<MVT> V;
V.push_back(VT1);
V.push_back(VT2);
VTList.push_front(V);
return makeVTList(&(*VTList.begin())[0], 2);
}
-SDVTList SelectionDAG::getVTList(MVT::ValueType VT1, MVT::ValueType VT2,
- MVT::ValueType VT3) {
- for (std::list<std::vector<MVT::ValueType> >::iterator I = VTList.begin(),
+SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2,
+ MVT VT3) {
+ for (std::list<std::vector<MVT> >::iterator I = VTList.begin(),
E = VTList.end(); I != E; ++I) {
if (I->size() == 3 && (*I)[0] == VT1 && (*I)[1] == VT2 &&
(*I)[2] == VT3)
return makeVTList(&(*I)[0], 3);
}
- std::vector<MVT::ValueType> V;
+ std::vector<MVT> V;
V.push_back(VT1);
V.push_back(VT2);
V.push_back(VT3);
return makeVTList(&(*VTList.begin())[0], 3);
}
-SDVTList SelectionDAG::getVTList(const MVT::ValueType *VTs, unsigned NumVTs) {
+SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
switch (NumVTs) {
case 0: assert(0 && "Cannot have nodes without results!");
case 1: return getVTList(VTs[0]);
default: break;
}
- for (std::list<std::vector<MVT::ValueType> >::iterator I = VTList.begin(),
+ for (std::list<std::vector<MVT> >::iterator I = VTList.begin(),
E = VTList.end(); I != E; ++I) {
if (I->size() != NumVTs || VTs[0] != (*I)[0] || VTs[1] != (*I)[1]) continue;
return makeVTList(&*I->begin(), NumVTs);
}
- VTList.push_front(std::vector<MVT::ValueType>(VTs, VTs+NumVTs));
+ VTList.push_front(std::vector<MVT>(VTs, VTs+NumVTs));
return makeVTList(&*VTList.begin()->begin(), NumVTs);
}
RemoveNodeFromCSEMaps(N);
// Now we update the operands.
- N->OperandList[0].Val->removeUser(0, N);
+ N->OperandList[0].getVal()->removeUser(0, N);
N->OperandList[0] = Op;
N->OperandList[0].setUser(N);
Op.Val->addUser(0, N);
// Now we update the operands.
if (N->OperandList[0] != Op1) {
- N->OperandList[0].Val->removeUser(0, N);
+ N->OperandList[0].getVal()->removeUser(0, N);
N->OperandList[0] = Op1;
N->OperandList[0].setUser(N);
Op1.Val->addUser(0, N);
}
if (N->OperandList[1] != Op2) {
- N->OperandList[1].Val->removeUser(1, N);
+ N->OperandList[1].getVal()->removeUser(1, N);
N->OperandList[1] = Op2;
N->OperandList[1].setUser(N);
Op2.Val->addUser(1, N);
}
SDOperand SelectionDAG::
-UpdateNodeOperands(SDOperand InN, SDOperand *Ops, unsigned NumOps) {
+UpdateNodeOperands(SDOperand InN, SDOperandPtr Ops, unsigned NumOps) {
SDNode *N = InN.Val;
assert(N->getNumOperands() == NumOps &&
"Update with wrong number of operands");
if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
return SDOperand(Existing, InN.ResNo);
- // Nope it doesn't. Remove the node from it's current place in the maps.
+ // Nope it doesn't. Remove the node from its current place in the maps.
if (InsertPos)
RemoveNodeFromCSEMaps(N);
// Now we update the operands.
for (unsigned i = 0; i != NumOps; ++i) {
if (N->OperandList[i] != Ops[i]) {
- N->OperandList[i].Val->removeUser(i, N);
+ N->OperandList[i].getVal()->removeUser(i, N);
N->OperandList[i] = Ops[i];
N->OperandList[i].setUser(N);
Ops[i].Val->addUser(i, N);
/// opcode, types, and operands to the specified value. This should only be
/// used by the SelectionDAG class.
void SDNode::MorphNodeTo(unsigned Opc, SDVTList L,
- const SDOperand *Ops, unsigned NumOps) {
+ SDOperandPtr Ops, unsigned NumOps) {
NodeType = Opc;
ValueList = L.VTs;
NumValues = L.NumVTs;
// Clear the operands list, updating used nodes to remove this from their
// use list.
for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
- I->Val->removeUser(std::distance(op_begin(), I), this);
+ I->getVal()->removeUser(std::distance(op_begin(), I), this);
// If NumOps is larger than the # of operands we currently have, reallocate
// the operand list.
if (OperandsNeedDelete) {
delete [] OperandList;
}
- OperandList = new SDOperand[NumOps];
+ OperandList = new SDUse[NumOps];
OperandsNeedDelete = true;
}
for (unsigned i = 0, e = NumOps; i != e; ++i) {
OperandList[i] = Ops[i];
OperandList[i].setUser(this);
- SDNode *N = OperandList[i].Val;
+ SDNode *N = OperandList[i].getVal();
N->addUser(i, this);
++N->UsesSize;
}
/// node of the specified opcode and operands, it returns that node instead of
/// the current one.
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
- MVT::ValueType VT) {
+ MVT VT) {
SDVTList VTs = getVTList(VT);
FoldingSetNodeID ID;
- AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, 0, 0);
+ AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, (SDOperand*)0, 0);
void *IP = 0;
if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
return ON;
RemoveNodeFromCSEMaps(N);
- N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, 0, 0);
+ N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, SDOperandPtr(), 0);
CSEMap.InsertNode(N, IP);
return N;
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
- MVT::ValueType VT, SDOperand Op1) {
+ MVT VT, SDOperand Op1) {
// If an identical node already exists, use it.
SDVTList VTs = getVTList(VT);
SDOperand Ops[] = { Op1 };
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
- MVT::ValueType VT, SDOperand Op1,
+ MVT VT, SDOperand Op1,
SDOperand Op2) {
// If an identical node already exists, use it.
SDVTList VTs = getVTList(VT);
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
- MVT::ValueType VT, SDOperand Op1,
+ MVT VT, SDOperand Op1,
SDOperand Op2, SDOperand Op3) {
// If an identical node already exists, use it.
SDVTList VTs = getVTList(VT);
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
- MVT::ValueType VT, const SDOperand *Ops,
+ MVT VT, SDOperandPtr Ops,
unsigned NumOps) {
// If an identical node already exists, use it.
SDVTList VTs = getVTList(VT);
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
- MVT::ValueType VT1, MVT::ValueType VT2,
+ MVT VT1, MVT VT2,
SDOperand Op1, SDOperand Op2) {
SDVTList VTs = getVTList(VT1, VT2);
FoldingSetNodeID ID;
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
- MVT::ValueType VT1, MVT::ValueType VT2,
+ MVT VT1, MVT VT2,
SDOperand Op1, SDOperand Op2,
SDOperand Op3) {
// If an identical node already exists, use it.
/// Note that getTargetNode returns the resultant node. If there is already a
/// node of the specified opcode and operands, it returns that node instead of
/// the current one.
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT) {
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
return getNode(ISD::BUILTIN_OP_END+Opcode, VT).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT,
- SDOperand Op1) {
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDOperand Op1) {
return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
SDOperand Op1, SDOperand Op2) {
return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
SDOperand Op1, SDOperand Op2,
SDOperand Op3) {
return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2, Op3).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT,
- const SDOperand *Ops, unsigned NumOps) {
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
+ SDOperandPtr Ops, unsigned NumOps) {
return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops, NumOps).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
- MVT::ValueType VT2) {
- const MVT::ValueType *VTs = getNodeValueTypes(VT1, VT2);
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
+ const MVT *VTs = getNodeValueTypes(VT1, VT2);
SDOperand Op;
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op, 0).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
- MVT::ValueType VT2, SDOperand Op1) {
- const MVT::ValueType *VTs = getNodeValueTypes(VT1, VT2);
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
+ MVT VT2, SDOperand Op1) {
+ const MVT *VTs = getNodeValueTypes(VT1, VT2);
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op1, 1).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
- MVT::ValueType VT2, SDOperand Op1,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
+ MVT VT2, SDOperand Op1,
SDOperand Op2) {
- const MVT::ValueType *VTs = getNodeValueTypes(VT1, VT2);
+ const MVT *VTs = getNodeValueTypes(VT1, VT2);
SDOperand Ops[] = { Op1, Op2 };
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 2).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
- MVT::ValueType VT2, SDOperand Op1,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
+ MVT VT2, SDOperand Op1,
SDOperand Op2, SDOperand Op3) {
- const MVT::ValueType *VTs = getNodeValueTypes(VT1, VT2);
+ const MVT *VTs = getNodeValueTypes(VT1, VT2);
SDOperand Ops[] = { Op1, Op2, Op3 };
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 3).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
- MVT::ValueType VT2,
- const SDOperand *Ops, unsigned NumOps) {
- const MVT::ValueType *VTs = getNodeValueTypes(VT1, VT2);
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
+ SDOperandPtr Ops, unsigned NumOps) {
+ const MVT *VTs = getNodeValueTypes(VT1, VT2);
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, NumOps).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
- MVT::ValueType VT2, MVT::ValueType VT3,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
SDOperand Op1, SDOperand Op2) {
- const MVT::ValueType *VTs = getNodeValueTypes(VT1, VT2, VT3);
+ const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
SDOperand Ops[] = { Op1, Op2 };
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 2).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
- MVT::ValueType VT2, MVT::ValueType VT3,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
SDOperand Op1, SDOperand Op2,
SDOperand Op3) {
- const MVT::ValueType *VTs = getNodeValueTypes(VT1, VT2, VT3);
+ const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
SDOperand Ops[] = { Op1, Op2, Op3 };
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 3).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
- MVT::ValueType VT2, MVT::ValueType VT3,
- const SDOperand *Ops, unsigned NumOps) {
- const MVT::ValueType *VTs = getNodeValueTypes(VT1, VT2, VT3);
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
+ SDOperandPtr Ops, unsigned NumOps) {
+ const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, NumOps).Val;
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT::ValueType VT1,
- MVT::ValueType VT2, MVT::ValueType VT3,
- MVT::ValueType VT4,
- const SDOperand *Ops, unsigned NumOps) {
- std::vector<MVT::ValueType> VTList;
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
+ MVT VT2, MVT VT3, MVT VT4,
+ SDOperandPtr Ops, unsigned NumOps) {
+ std::vector<MVT> VTList;
VTList.push_back(VT1);
VTList.push_back(VT2);
VTList.push_back(VT3);
VTList.push_back(VT4);
- const MVT::ValueType *VTs = getNodeValueTypes(VTList);
+ const MVT *VTs = getNodeValueTypes(VTList);
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 4, Ops, NumOps).Val;
}
SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
- std::vector<MVT::ValueType> &ResultTys,
- const SDOperand *Ops, unsigned NumOps) {
- const MVT::ValueType *VTs = getNodeValueTypes(ResultTys);
+ std::vector<MVT> &ResultTys,
+ SDOperandPtr Ops, unsigned NumOps) {
+ const MVT *VTs = getNodeValueTypes(ResultTys);
return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, ResultTys.size(),
Ops, NumOps).Val;
}
/// getNodeIfExists - Get the specified node if it's already available, or
/// else return NULL.
SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
- const SDOperand *Ops, unsigned NumOps) {
+ SDOperandPtr Ops, unsigned NumOps) {
if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
int operandNum = 0;
for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
I != E; ++I, ++operandNum)
- if (I->Val == From) {
+ if (I->getVal() == From) {
From->removeUser(operandNum, U);
*I = To;
I->setUser(U);
ReplaceAllUsesWith(U, Existing, UpdateListener);
// U is now dead. Inform the listener if it exists and delete it.
if (UpdateListener)
- UpdateListener->NodeDeleted(U);
+ UpdateListener->NodeDeleted(U, Existing);
DeleteNodeNotInCSEMaps(U);
} else {
// If the node doesn't already exist, we updated it. Inform a listener if
int operandNum = 0;
for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
I != E; ++I, ++operandNum)
- if (I->Val == From) {
+ if (I->getVal() == From) {
From->removeUser(operandNum, U);
- I->Val = To;
+ I->getVal() = To;
To->addUser(operandNum, U);
}
ReplaceAllUsesWith(U, Existing, UpdateListener);
// U is now dead. Inform the listener if it exists and delete it.
if (UpdateListener)
- UpdateListener->NodeDeleted(U);
+ UpdateListener->NodeDeleted(U, Existing);
DeleteNodeNotInCSEMaps(U);
} else {
// If the node doesn't already exist, we updated it. Inform a listener if
/// This version can replace From with any result values. To must match the
/// number and types of values returned by From.
void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
- const SDOperand *To,
+ SDOperandPtr To,
DAGUpdateListener *UpdateListener) {
if (From->getNumValues() == 1) // Handle the simple case efficiently.
return ReplaceAllUsesWith(SDOperand(From, 0), To[0], UpdateListener);
int operandNum = 0;
for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
I != E; ++I, ++operandNum)
- if (I->Val == From) {
- const SDOperand &ToOp = To[I->ResNo];
+ if (I->getVal() == From) {
+ const SDOperand &ToOp = To[I->getSDOperand().ResNo];
From->removeUser(operandNum, U);
*I = ToOp;
I->setUser(U);
ReplaceAllUsesWith(U, Existing, UpdateListener);
// U is now dead. Inform the listener if it exists and delete it.
if (UpdateListener)
- UpdateListener->NodeDeleted(U);
+ UpdateListener->NodeDeleted(U, Existing);
DeleteNodeNotInCSEMaps(U);
} else {
// If the node doesn't already exist, we updated it. Inform a listener if
SelectionDAG::DAGUpdateListener *chain)
: Set(set), Chain(chain) {}
- virtual void NodeDeleted(SDNode *N) {
+ virtual void NodeDeleted(SDNode *N, SDNode *E) {
Set.remove(N);
- if (Chain) Chain->NodeDeleted(N);
+ if (Chain) Chain->NodeDeleted(N, E);
}
virtual void NodeUpdated(SDNode *N) {
if (Chain) Chain->NodeUpdated(N);
ReplaceAllUsesWith(User, Existing, &CSUL);
// User is now dead. Notify a listener if present.
- if (UpdateListener) UpdateListener->NodeDeleted(User);
+ if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
DeleteNodeNotInCSEMaps(User);
}
}
-
/// AssignNodeIds - Assign a unique node id for each node in the DAG based on
/// their allnodes order. It returns the maximum id.
unsigned SelectionDAG::AssignNodeIds() {
Sources.pop_back();
TopOrder.push_back(N);
for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
- SDNode *P = I->Val;
+ SDNode *P = I->getVal();
unsigned Degree = --InDegree[P->getNodeId()];
if (Degree == 0)
Sources.push_back(P);
HandleSDNode::~HandleSDNode() {
SDVTList VTs = { 0, 0 };
- MorphNodeTo(ISD::HANDLENODE, VTs, 0, 0); // Drops operand uses.
+ MorphNodeTo(ISD::HANDLENODE, VTs, SDOperandPtr(), 0); // Drops operand uses.
}
GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
- MVT::ValueType VT, int o)
+ MVT VT, int o)
: SDNode(isa<GlobalVariable>(GA) &&
cast<GlobalVariable>(GA)->isThreadLocal() ?
// Thread Local
/// getMemOperand - Return a MachineMemOperand object describing the memory
/// reference performed by this load or store.
MachineMemOperand LSBaseSDNode::getMemOperand() const {
- int Size = (MVT::getSizeInBits(getMemoryVT()) + 7) >> 3;
+ int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
int Flags =
getOpcode() == ISD::LOAD ? MachineMemOperand::MOLoad :
MachineMemOperand::MOStore;
/// getValueTypeList - Return a pointer to the specified value type.
///
-const MVT::ValueType *SDNode::getValueTypeList(MVT::ValueType VT) {
- if (MVT::isExtendedVT(VT)) {
- static std::set<MVT::ValueType> EVTs;
+const MVT *SDNode::getValueTypeList(MVT VT) {
+ if (VT.isExtended()) {
+ static std::set<MVT, MVT::compareRawBits> EVTs;
return &(*EVTs.insert(VT).first);
} else {
- static MVT::ValueType VTs[MVT::LAST_VALUETYPE];
- VTs[VT] = VT;
- return &VTs[VT];
+ static MVT VTs[MVT::LAST_VALUETYPE];
+ VTs[VT.getSimpleVT()] = VT;
+ return &VTs[VT.getSimpleVT()];
}
}
/// isOperand - Return true if this node is an operand of N.
///
-bool SDOperandImpl::isOperandOf(SDNode *N) const {
+bool SDOperand::isOperandOf(SDNode *N) const {
for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
if (*this == N->getOperand(i))
return true;
bool SDNode::isOperandOf(SDNode *N) const {
for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
- if (this == N->OperandList[i].Val)
+ if (this == N->OperandList[i].getVal())
return true;
return false;
}
/// side-effecting instructions. In practice, this looks through token
/// factors and non-volatile loads. In order to remain efficient, this only
/// looks a couple of nodes in, it does not do an exhaustive search.
-bool SDOperandImpl::reachesChainWithoutSideEffects(SDOperandImpl Dest,
+bool SDOperand::reachesChainWithoutSideEffects(SDOperand Dest,
unsigned Depth) const {
if (*this == Dest) return true;
case ISD::MEMBARRIER: return "MemBarrier";
case ISD::ATOMIC_LCS: return "AtomicLCS";
case ISD::ATOMIC_LAS: return "AtomicLAS";
- case ISD::ATOMIC_SWAP: return "AtomicSWAP";
+ case ISD::ATOMIC_LSS: return "AtomicLSS";
+ case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
+ case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
+ case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
+ case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
+ case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
+ case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
+ case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
+ case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
+ case ISD::ATOMIC_SWAP: return "AtomicSWAP";
case ISD::PCMARKER: return "PCMarker";
case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
case ISD::SRCVALUE: return "SrcValue";
case ISD::FGETSIGN: return "fgetsign";
case ISD::SETCC: return "setcc";
+ case ISD::VSETCC: return "vsetcc";
case ISD::SELECT: return "select";
case ISD::SELECT_CC: return "select_cc";
case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
if (getValueType(i) == MVT::Other)
cerr << "ch";
else
- cerr << MVT::getValueTypeString(getValueType(i));
+ cerr << getValueType(i).getMVTString();
}
cerr << " = " << getOperationName(G);
} else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
cerr << N->getArgFlags().getArgFlagsString();
} else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
- cerr << ":" << MVT::getValueTypeString(N->getVT());
+ cerr << ":" << N->getVT().getMVTString();
} else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
const Value *SrcValue = LD->getSrcValue();
int SrcOffset = LD->getSrcValueOffset();
break;
}
if (doExt)
- cerr << MVT::getValueTypeString(LD->getMemoryVT()) << ">";
+ cerr << LD->getMemoryVT().getMVTString() << ">";
const char *AM = getIndexedModeName(LD->getAddressingMode());
if (*AM)
if (ST->isTruncatingStore())
cerr << " <trunc "
- << MVT::getValueTypeString(ST->getMemoryVT()) << ">";
+ << ST->getMemoryVT().getMVTString() << ">";
const char *AM = getIndexedModeName(ST->getAddressingMode());
if (*AM)
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