//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
#include "llvm/CodeGen/RegisterCoalescer.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/IndexedMap.h"
+#include <queue>
namespace llvm {
-
+ class SimpleRegisterCoalescing;
class LiveVariables;
- class MRegisterInfo;
+ class TargetRegisterInfo;
class TargetInstrInfo;
class VirtRegMap;
+ class MachineLoopInfo;
+
+ /// CopyRec - Representation for copy instructions in coalescer queue.
+ ///
+ struct CopyRec {
+ MachineInstr *MI;
+ unsigned LoopDepth;
+ bool isBackEdge;
+ CopyRec(MachineInstr *mi, unsigned depth, bool be)
+ : MI(mi), LoopDepth(depth), isBackEdge(be) {};
+ };
+
+ template<class SF> class JoinPriorityQueue;
+
+ /// CopyRecSort - Sorting function for coalescer queue.
+ ///
+ struct CopyRecSort : public std::binary_function<CopyRec,CopyRec,bool> {
+ JoinPriorityQueue<CopyRecSort> *JPQ;
+ explicit CopyRecSort(JoinPriorityQueue<CopyRecSort> *jpq) : JPQ(jpq) {}
+ CopyRecSort(const CopyRecSort &RHS) : JPQ(RHS.JPQ) {}
+ bool operator()(CopyRec left, CopyRec right) const;
+ };
+
+ /// JoinQueue - A priority queue of copy instructions the coalescer is
+ /// going to process.
+ template<class SF>
+ class JoinPriorityQueue {
+ SimpleRegisterCoalescing *Rc;
+ std::priority_queue<CopyRec, std::vector<CopyRec>, SF> Queue;
+
+ public:
+ explicit JoinPriorityQueue(SimpleRegisterCoalescing *rc)
+ : Rc(rc), Queue(SF(this)) {}
+
+ bool empty() const { return Queue.empty(); }
+ void push(CopyRec R) { Queue.push(R); }
+ CopyRec pop() {
+ if (empty()) return CopyRec(0, 0, false);
+ CopyRec R = Queue.top();
+ Queue.pop();
+ return R;
+ }
+
+ // Callbacks to SimpleRegisterCoalescing.
+ unsigned getRepIntervalSize(unsigned Reg);
+ };
class SimpleRegisterCoalescing : public MachineFunctionPass,
public RegisterCoalescer {
MachineFunction* mf_;
+ MachineRegisterInfo* mri_;
const TargetMachine* tm_;
- const MRegisterInfo* mri_;
+ const TargetRegisterInfo* tri_;
const TargetInstrInfo* tii_;
LiveIntervals *li_;
- LiveVariables *lv_;
+ const MachineLoopInfo* loopInfo;
BitVector allocatableRegs_;
DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs_;
- /// r2rMap_ - Map from register to its representative register.
- ///
- IndexedMap<unsigned> r2rMap_;
-
- /// r2rRevMap_ - Reverse of r2rRevMap_, i.e. Map from register to all
- /// the registers it represent.
- IndexedMap<std::vector<unsigned> > r2rRevMap_;
-
- /// JoinedLIs - Keep track which register intervals have been coalesced
- /// with other intervals.
- BitVector JoinedLIs;
-
- /// SubRegIdxes - Keep track of sub-register and indexes.
- ///
- SmallVector<std::pair<unsigned, unsigned>, 32> SubRegIdxes;
+ /// JoinQueue - A priority queue of copy instructions the coalescer is
+ /// going to process.
+ JoinPriorityQueue<CopyRecSort> *JoinQueue;
/// JoinedCopies - Keep track of copies eliminated due to coalescing.
///
static char ID; // Pass identifcation, replacement for typeid
SimpleRegisterCoalescing() : MachineFunctionPass((intptr_t)&ID) {}
- struct CopyRec {
- MachineInstr *MI;
- unsigned SrcReg, DstReg;
- };
- CopyRec getCopyRec(MachineInstr *MI, unsigned SrcReg, unsigned DstReg) {
- CopyRec R;
- R.MI = MI;
- R.SrcReg = SrcReg;
- R.DstReg = DstReg;
- return R;
- }
struct InstrSlots {
enum {
LOAD = 0,
bool coalesceFunction(MachineFunction &mf, RegallocQuery &) {
// This runs as an independent pass, so don't do anything.
- return(false);
+ return false;
};
+ /// getRepIntervalSize - Called from join priority queue sorting function.
+ /// It returns the size of the interval that represent the given register.
+ unsigned getRepIntervalSize(unsigned Reg) {
+ if (!li_->hasInterval(Reg))
+ return 0;
+ return li_->getInterval(Reg).getSize();
+ }
+
/// print - Implement the dump method.
virtual void print(std::ostream &O, const Module* = 0) const;
void print(std::ostream *O, const Module* M = 0) const {
if (O) print(*O, M);
}
- private:
+ private:
/// joinIntervals - join compatible live intervals
void joinIntervals();
/// if the copy was successfully coalesced away. If it is not currently
/// possible to coalesce this interval, but it may be possible if other
/// things get coalesced, then it returns true by reference in 'Again'.
- bool JoinCopy(MachineInstr *CopyMI, unsigned SrcReg, unsigned DstReg,
- bool &Again);
+ bool JoinCopy(CopyRec &TheCopy, bool &Again);
/// JoinIntervals - Attempt to join these two intervals. On failure, this
/// returns false. Otherwise, if one of the intervals being joined is a
/// joins them and returns true.
bool SimpleJoin(LiveInterval &LHS, LiveInterval &RHS);
- /// Return true if the two specified registers belong to different
- /// register classes. The registers may be either phys or virt regs.
- bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
+ /// Return true if the two specified registers belong to different register
+ /// classes. The registers may be either phys or virt regs. In the
+ /// case where both registers are virtual registers, it would also returns
+ /// true by reference the RegB register class in SubRC if it is a subset of
+ /// RegA's register class.
+ bool differingRegisterClasses(unsigned RegA, unsigned RegB,
+ const TargetRegisterClass *&SubRC) const;
+ /// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy. If
+ /// the source value number is defined by a copy from the destination reg
+ /// see if we can merge these two destination reg valno# into a single
+ /// value number, eliminating a copy.
bool AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
MachineInstr *CopyMI);
- /// AddSubRegIdxPairs - Recursively mark all the registers represented by the
- /// specified register as sub-registers. The recursion level is expected to be
- /// shallow.
- void AddSubRegIdxPairs(unsigned Reg, unsigned SubIdx);
+ /// HasOtherReachingDefs - Return true if there are definitions of IntB
+ /// other than BValNo val# that can reach uses of AValno val# of IntA.
+ bool HasOtherReachingDefs(LiveInterval &IntA, LiveInterval &IntB,
+ VNInfo *AValNo, VNInfo *BValNo);
- /// lastRegisterUse - Returns the last use of the specific register between
- /// cycles Start and End. It also returns the use operand by reference. It
- /// returns NULL if there are no uses.
- MachineInstr *lastRegisterUse(unsigned Start, unsigned End, unsigned Reg,
- MachineOperand *&MOU);
+ /// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy.
+ /// If the source value number is defined by a commutable instruction and
+ /// its other operand is coalesced to the copy dest register, see if we
+ /// can transform the copy into a noop by commuting the definition.
+ bool RemoveCopyByCommutingDef(LiveInterval &IntA, LiveInterval &IntB,
+ MachineInstr *CopyMI);
+
+ /// TurnCopyIntoImpDef - If source of the specified copy is an implicit def,
+ /// turn the copy into an implicit def.
+ bool TurnCopyIntoImpDef(MachineBasicBlock::iterator &I,
+ MachineBasicBlock *MBB,
+ unsigned DstReg, unsigned SrcReg);
+
+ /// CanCoalesceWithImpDef - Returns true if the specified copy instruction
+ /// from an implicit def to another register can be coalesced away.
+ bool CanCoalesceWithImpDef(MachineInstr *CopyMI,
+ LiveInterval &li, LiveInterval &ImpLi) const;
- /// findDefOperand - Returns the MachineOperand that is a def of the specific
- /// register. It returns NULL if the def is not found.
- MachineOperand *findDefOperand(MachineInstr *MI, unsigned Reg);
+ /// RemoveCopiesFromValNo - The specified value# is defined by an implicit
+ /// def and it is being removed. Turn all copies from this value# into
+ /// identity copies so they will be removed.
+ void RemoveCopiesFromValNo(LiveInterval &li, VNInfo *VNI);
- /// unsetRegisterKill - Unset IsKill property of all uses of the specific
- /// register of the specific instruction.
- void unsetRegisterKill(MachineInstr *MI, unsigned Reg);
+ /// isProfitableToCoalesceToSubRC - Given that register class of DstReg is
+ /// a subset of the register class of SrcReg, return true if it's profitable
+ /// to coalesce the two registers.
+ bool isProfitableToCoalesceToSubRC(unsigned SrcReg, unsigned DstReg,
+ MachineBasicBlock *MBB);
- /// unsetRegisterKills - Unset IsKill property of all uses of specific register
- /// between cycles Start and End.
- void unsetRegisterKills(unsigned Start, unsigned End, unsigned Reg);
+ /// RangeIsDefinedByCopyFromReg - Return true if the specified live range of
+ /// the specified live interval is defined by a copy from the specified
+ /// register.
+ bool RangeIsDefinedByCopyFromReg(LiveInterval &li, LiveRange *LR,
+ unsigned Reg);
- /// hasRegisterDef - True if the instruction defines the specific register.
+ /// isBackEdgeCopy - Return true if CopyMI is a back edge copy.
///
- bool hasRegisterDef(MachineInstr *MI, unsigned Reg);
-
- /// rep - returns the representative of this register
- unsigned rep(unsigned Reg) {
- unsigned Rep = r2rMap_[Reg];
- if (Rep)
- return r2rMap_[Reg] = rep(Rep);
- return Reg;
- }
+ bool isBackEdgeCopy(MachineInstr *CopyMI, unsigned DstReg) const;
+
+ /// UpdateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
+ /// update the subregister number if it is not zero. If DstReg is a
+ /// physical register and the existing subregister number of the def / use
+ /// being updated is not zero, make sure to set it to the correct physical
+ /// subregister.
+ void UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned SubIdx);
+
+ /// RemoveDeadImpDef - Remove implicit_def instructions which are
+ /// "re-defining" registers due to insert_subreg coalescing. e.g.
+ void RemoveDeadImpDef(unsigned Reg, LiveInterval &LI);
+
+ /// RemoveUnnecessaryKills - Remove kill markers that are no longer accurate
+ /// due to live range lengthening as the result of coalescing.
+ void RemoveUnnecessaryKills(unsigned Reg, LiveInterval &LI);
+
+ /// ShortenDeadCopyLiveRange - Shorten a live range defined by a dead copy.
+ /// Return true if live interval is removed.
+ bool ShortenDeadCopyLiveRange(LiveInterval &li, MachineInstr *CopyMI);
+
+ /// ShortenDeadCopyLiveRange - Shorten a live range as it's artificially
+ /// extended by a dead copy. Mark the last use (if any) of the val# as kill
+ /// as ends the live range there. If there isn't another use, then this
+ /// live range is dead. Return true if live interval is removed.
+ bool ShortenDeadCopySrcLiveRange(LiveInterval &li, MachineInstr *CopyMI);
+
+ /// lastRegisterUse - Returns the last use of the specific register between
+ /// cycles Start and End or NULL if there are no uses.
+ MachineOperand *lastRegisterUse(unsigned Start, unsigned End, unsigned Reg,
+ unsigned &LastUseIdx) const;
void printRegName(unsigned reg) const;
};