[C++11] DwarfDebug: Use range-based for loops.

[oota-llvm.git] / lib / CodeGen / StackMaps.cpp

diff --git a/lib/CodeGen/StackMaps.cpp b/lib/CodeGen/StackMaps.cpp
index 8adaf0bcc160035ec95636a30885458a273a4861..f347e96971817ff5122540e8d481116bf0e6614f 100644 (file)
--- a/lib/CodeGen/StackMaps.cpp
+++ b/lib/CodeGen/StackMaps.cpp
@@ -11,8 +11,8 @@
 
 #include "llvm/CodeGen/StackMaps.h"
 #include "llvm/CodeGen/AsmPrinter.h"
-#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/IR/DataLayout.h"
 #include "llvm/MC/MCContext.h"
@@ -125,22 +125,19 @@ StackMaps::parseOperand(MachineInstr::const_mop_iterator MOI,
 }
 
 /// Go up the super-register chain until we hit a valid dwarf register number.
-static unsigned short getDwarfRegNum(unsigned Reg, const MCRegisterInfo &MCRI,
-                                     const TargetRegisterInfo *TRI) {
-  int RegNo = MCRI.getDwarfRegNum(Reg, false);
-  for (MCSuperRegIterator SR(Reg, TRI);
-       SR.isValid() && RegNo < 0; ++SR)
+static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) {
+  int RegNo = TRI->getDwarfRegNum(Reg, false);
+  for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNo < 0; ++SR)
     RegNo = TRI->getDwarfRegNum(*SR, false);
 
   assert(RegNo >= 0 && "Invalid Dwarf register number.");
-  return (unsigned short) RegNo;
+  return (unsigned) RegNo;
 }
 
 /// Create a live-out register record for the given register Reg.
 StackMaps::LiveOutReg
-StackMaps::createLiveOutReg(unsigned Reg, const MCRegisterInfo &MCRI,
-                            const TargetRegisterInfo *TRI) const {
-  unsigned RegNo = getDwarfRegNum(Reg, MCRI, TRI);
+StackMaps::createLiveOutReg(unsigned Reg, const TargetRegisterInfo *TRI) const {
+  unsigned RegNo = getDwarfRegNum(Reg, TRI);
   unsigned Size = TRI->getMinimalPhysRegClass(Reg)->getSize();
   return LiveOutReg(Reg, RegNo, Size);
 }
@@ -151,14 +148,12 @@ StackMaps::LiveOutVec
 StackMaps::parseRegisterLiveOutMask(const uint32_t *Mask) const {
   assert(Mask && "No register mask specified");
   const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo();
-  MCContext &OutContext = AP.OutStreamer.getContext();
-  const MCRegisterInfo &MCRI = *OutContext.getRegisterInfo();
   LiveOutVec LiveOuts;
 
   // Create a LiveOutReg for each bit that is set in the register mask.
   for (unsigned Reg = 0, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg)
     if ((Mask[Reg / 32] >> Reg % 32) & 1)
-      LiveOuts.push_back(createLiveOutReg(Reg, MCRI, TRI));
+      LiveOuts.push_back(createLiveOutReg(Reg, TRI));
 
   // We don't need to keep track of a register if its super-register is already
   // in the list. Merge entries that refer to the same dwarf register and use
@@ -166,7 +161,7 @@ StackMaps::parseRegisterLiveOutMask(const uint32_t *Mask) const {
   std::sort(LiveOuts.begin(), LiveOuts.end());
   for (LiveOutVec::iterator I = LiveOuts.begin(), E = LiveOuts.end();
        I != E; ++I) {
-    for (LiveOutVec::iterator II = next(I); II != E; ++II) {
+    for (LiveOutVec::iterator II = std::next(I); II != E; ++II) {
       if (I->RegNo != II->RegNo) {
         // Skip all the now invalid entries.
         I = --II;
@@ -197,7 +192,7 @@ void StackMaps::recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
 
   if (recordResult) {
     assert(PatchPointOpers(&MI).hasDef() && "Stackmap has no return value.");
-    parseOperand(MI.operands_begin(), llvm::next(MI.operands_begin()),
+    parseOperand(MI.operands_begin(), std::next(MI.operands_begin()),
                  Locations, LiveOuts);
   }
 
@@ -237,7 +232,7 @@ void StackMaps::recordStackMap(const MachineInstr &MI) {
   assert(MI.getOpcode() == TargetOpcode::STACKMAP && "expected stackmap");
 
   int64_t ID = MI.getOperand(0).getImm();
-  recordStackMapOpers(MI, ID, llvm::next(MI.operands_begin(), 2),
+  recordStackMapOpers(MI, ID, std::next(MI.operands_begin(), 2),
                       MI.operands_end());
 }
 
@@ -248,7 +243,7 @@ void StackMaps::recordPatchPoint(const MachineInstr &MI) {
   int64_t ID = opers.getMetaOper(PatchPointOpers::IDPos).getImm();
 
   MachineInstr::const_mop_iterator MOI =
-    llvm::next(MI.operands_begin(), opers.getStackMapStartIdx());
+    std::next(MI.operands_begin(), opers.getStackMapStartIdx());
   recordStackMapOpers(MI, ID, MOI, MI.operands_end(),
                       opers.isAnyReg() && opers.hasDef());
 
@@ -320,7 +315,6 @@ void StackMaps::serializeToStackMapSection() {
   // Serialize data.
   const char *WSMP = "Stack Maps: ";
   (void)WSMP;
-  const MCRegisterInfo &MCRI = *OutContext.getRegisterInfo();
 
   DEBUG(dbgs() << "********** Stack Map Output **********\n");
 
@@ -333,7 +327,7 @@ void StackMaps::serializeToStackMapSection() {
   // Stack size entries.
   for (FnStackSizeMap::iterator I = FnStackSize.begin(), E = FnStackSize.end();
        I != E; ++I) {
-    AP.EmitLabelReference(I->first, 4, true);
+    AP.OutStreamer.EmitSymbolValue(I->first, 4);
     AP.OutStreamer.EmitIntValue(I->second, 4);
   }
 
@@ -387,19 +381,16 @@ void StackMaps::serializeToStackMapSection() {
       unsigned RegNo = 0;
       int Offset = Loc.Offset;
       if(Loc.Reg) {
-        RegNo = MCRI.getDwarfRegNum(Loc.Reg, false);
-        for (MCSuperRegIterator SR(Loc.Reg, TRI);
-             SR.isValid() && (int)RegNo < 0; ++SR) {
-          RegNo = TRI->getDwarfRegNum(*SR, false);
-        }
+        RegNo = getDwarfRegNum(Loc.Reg, TRI);
+
         // If this is a register location, put the subregister byte offset in
         // the location offset.
         if (Loc.LocType == Location::Register) {
           assert(!Loc.Offset && "Register location should have zero offset");
-          unsigned LLVMRegNo = MCRI.getLLVMRegNum(RegNo, false);
-          unsigned SubRegIdx = MCRI.getSubRegIndex(LLVMRegNo, Loc.Reg);
+          unsigned LLVMRegNo = TRI->getLLVMRegNum(RegNo, false);
+          unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNo, Loc.Reg);
           if (SubRegIdx)
-            Offset = MCRI.getSubRegIdxOffset(SubRegIdx);
+            Offset = TRI->getSubRegIdxOffset(SubRegIdx);
         }
       }
       else {
@@ -414,15 +405,15 @@ void StackMaps::serializeToStackMapSection() {
           dbgs() << "<Unprocessed operand>";
           break;
         case Location::Register:
-          dbgs() << "Register " << MCRI.getName(Loc.Reg);
+          dbgs() << "Register " << TRI->getName(Loc.Reg);
           break;
         case Location::Direct:
-          dbgs() << "Direct " << MCRI.getName(Loc.Reg);
+          dbgs() << "Direct " << TRI->getName(Loc.Reg);
           if (Loc.Offset)
             dbgs() << " + " << Loc.Offset;
           break;
         case Location::Indirect:
-          dbgs() << "Indirect " << MCRI.getName(Loc.Reg)
+          dbgs() << "Indirect " << TRI->getName(Loc.Reg)
                  << " + " << Loc.Offset;
           break;
         case Location::Constant:
@@ -453,7 +444,7 @@ void StackMaps::serializeToStackMapSection() {
     for (LiveOutVec::const_iterator LI = LiveOuts.begin(), LE = LiveOuts.end();
          LI != LE; ++LI, ++operIdx) {
       DEBUG(dbgs() << WSMP << "  LO " << operIdx << ": "
-                   << MCRI.getName(LI->Reg)
+                   << TRI->getName(LI->Reg)
                    << "     [encoding: .short " << LI->RegNo
                    << ", .byte 0, .byte " << LI->Size << "]\n");