#define DEBUG_TYPE "strongphielim"
#include "llvm/CodeGen/Passes.h"
-#include "llvm/CodeGen/LiveVariables.h"
+#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/RegisterCoalescer.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/Support/Compiler.h"
using namespace llvm;
-
namespace {
struct VISIBILITY_HIDDEN StrongPHIElimination : public MachineFunctionPass {
static char ID; // Pass identification, replacement for typeid
// used as operands to another another PHI node
std::set<unsigned> UsedByAnother;
- // RenameSets are the sets of operands to a PHI (the defining instruction
- // of the key) that can be renamed without copies
- std::map<unsigned, std::set<unsigned> > RenameSets;
+ // RenameSets are the sets of operands (and their VNInfo IDs) to a PHI
+ // (the defining instruction of the key) that can be renamed without copies.
+ std::map<unsigned, std::map<unsigned, unsigned> > RenameSets;
+
+ // PhiValueNumber holds the ID numbers of the VNs for each phi that we're
+ // eliminating, indexed by the register defined by that phi.
+ std::map<unsigned, unsigned> PhiValueNumber;
// Store the DFS-in number of each block
DenseMap<MachineBasicBlock*, unsigned> preorder;
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineDominatorTree>();
- AU.addRequired<LiveVariables>();
+ AU.addRequired<LiveIntervals>();
+
+ // TODO: Actually make this true.
+ AU.addPreserved<LiveIntervals>();
+ AU.addPreserved<RegisterCoalescer>();
MachineFunctionPass::getAnalysisUsage(AU);
}
void computeDFS(MachineFunction& MF);
void processBlock(MachineBasicBlock* MBB);
- std::vector<DomForestNode*> computeDomForest(std::set<unsigned>& instrs);
+ std::vector<DomForestNode*> computeDomForest(std::map<unsigned, unsigned>& instrs,
+ MachineRegisterInfo& MRI);
void processPHIUnion(MachineInstr* Inst,
- std::set<unsigned>& PHIUnion,
+ std::map<unsigned, unsigned>& PHIUnion,
std::vector<StrongPHIElimination::DomForestNode*>& DF,
std::vector<std::pair<unsigned, unsigned> >& locals);
void ScheduleCopies(MachineBasicBlock* MBB, std::set<unsigned>& pushed);
- void InsertCopies(MachineBasicBlock* MBB, std::set<MachineBasicBlock*>& v);
+ void InsertCopies(MachineBasicBlock* MBB,
+ SmallPtrSet<MachineBasicBlock*, 16>& v);
+ void mergeLiveIntervals(unsigned primary, unsigned secondary, unsigned VN);
};
-
- char StrongPHIElimination::ID = 0;
- RegisterPass<StrongPHIElimination> X("strong-phi-node-elimination",
- "Eliminate PHI nodes for register allocation, intelligently");
}
-const PassInfo *llvm::StrongPHIEliminationID = X.getPassInfo();
+char StrongPHIElimination::ID = 0;
+static RegisterPass<StrongPHIElimination>
+X("strong-phi-node-elimination",
+ "Eliminate PHI nodes for register allocation, intelligently");
+
+const PassInfo *const llvm::StrongPHIEliminationID = &X;
/// computeDFS - Computes the DFS-in and DFS-out numbers of the dominator tree
/// of the given MachineFunction. These numbers are then used in other parts
}
bool inserted = false;
- for (MachineDomTreeNode::iterator I = node->begin(), E = node->end();
+ for (MachineDomTreeNode::iterator I = currNode->begin(), E = currNode->end();
I != E; ++I)
if (!frontier.count(*I) && !visited.count(*I)) {
worklist.push_back(*I);
}
}
+namespace {
+
/// PreorderSorter - a helper class that is used to sort registers
/// according to the preorder number of their defining blocks
class PreorderSorter {
private:
DenseMap<MachineBasicBlock*, unsigned>& preorder;
- LiveVariables& LV;
+ MachineRegisterInfo& MRI;
public:
PreorderSorter(DenseMap<MachineBasicBlock*, unsigned>& p,
- LiveVariables& L) : preorder(p), LV(L) { }
+ MachineRegisterInfo& M) : preorder(p), MRI(M) { }
bool operator()(unsigned A, unsigned B) {
if (A == B)
return false;
- MachineBasicBlock* ABlock = LV.getVarInfo(A).DefInst->getParent();
- MachineBasicBlock* BBlock = LV.getVarInfo(A).DefInst->getParent();
+ MachineBasicBlock* ABlock = MRI.getVRegDef(A)->getParent();
+ MachineBasicBlock* BBlock = MRI.getVRegDef(B)->getParent();
if (preorder[ABlock] < preorder[BBlock])
return true;
}
};
+}
+
/// computeDomForest - compute the subforest of the DomTree corresponding
/// to the defining blocks of the registers in question
std::vector<StrongPHIElimination::DomForestNode*>
-StrongPHIElimination::computeDomForest(std::set<unsigned>& regs) {
- LiveVariables& LV = getAnalysis<LiveVariables>();
-
+StrongPHIElimination::computeDomForest(std::map<unsigned, unsigned>& regs,
+ MachineRegisterInfo& MRI) {
// Begin by creating a virtual root node, since the actual results
// may well be a forest. Assume this node has maximum DFS-out number.
DomForestNode* VirtualRoot = new DomForestNode(0, 0);
// Populate a worklist with the registers
std::vector<unsigned> worklist;
worklist.reserve(regs.size());
- for (std::set<unsigned>::iterator I = regs.begin(), E = regs.end();
+ for (std::map<unsigned, unsigned>::iterator I = regs.begin(), E = regs.end();
I != E; ++I)
- worklist.push_back(*I);
+ worklist.push_back(I->first);
// Sort the registers by the DFS-in number of their defining block
- PreorderSorter PS(preorder, LV);
+ PreorderSorter PS(preorder, MRI);
std::sort(worklist.begin(), worklist.end(), PS);
// Create a "current parent" stack, and put the virtual root on top of it
// Iterate over all the registers in the previously computed order
for (std::vector<unsigned>::iterator I = worklist.begin(), E = worklist.end();
I != E; ++I) {
- unsigned pre = preorder[LV.getVarInfo(*I).DefInst->getParent()];
+ unsigned pre = preorder[MRI.getVRegDef(*I)->getParent()];
MachineBasicBlock* parentBlock = CurrentParent->getReg() ?
- LV.getVarInfo(CurrentParent->getReg()).DefInst->getParent() :
+ MRI.getVRegDef(CurrentParent->getReg())->getParent() :
0;
// If the DFS-in number of the register is greater than the DFS-out number
CurrentParent = stack.back();
parentBlock = CurrentParent->getReg() ?
- LV.getVarInfo(CurrentParent->getReg()).DefInst->getParent() :
+ MRI.getVRegDef(CurrentParent->getReg())->getParent() :
0;
}
return ret;
}
-/// isLiveIn - helper method that determines, from a VarInfo, if a register
+/// isLiveIn - helper method that determines, from a regno, if a register
/// is live into a block
-static bool isLiveIn(LiveVariables::VarInfo& V, MachineBasicBlock* MBB) {
- if (V.AliveBlocks.test(MBB->getNumber()))
- return true;
-
- if (V.DefInst->getParent() != MBB &&
- V.UsedBlocks.test(MBB->getNumber()))
- return true;
-
- return false;
+static bool isLiveIn(unsigned r, MachineBasicBlock* MBB,
+ LiveIntervals& LI) {
+ LiveInterval& I = LI.getOrCreateInterval(r);
+ unsigned idx = LI.getMBBStartIdx(MBB);
+ return I.liveBeforeAndAt(idx);
}
-/// isLiveOut - help method that determines, from a VarInfo, if a register is
+/// isLiveOut - help method that determines, from a regno, if a register is
/// live out of a block.
-static bool isLiveOut(LiveVariables::VarInfo& V, MachineBasicBlock* MBB) {
- if (MBB == V.DefInst->getParent() ||
- V.UsedBlocks.test(MBB->getNumber())) {
- for (std::vector<MachineInstr*>::iterator I = V.Kills.begin(),
- E = V.Kills.end(); I != E; ++I)
- if ((*I)->getParent() == MBB)
- return false;
-
- return true;
+static bool isLiveOut(unsigned r, MachineBasicBlock* MBB,
+ LiveIntervals& LI) {
+ for (MachineBasicBlock::succ_iterator PI = MBB->succ_begin(),
+ E = MBB->succ_end(); PI != E; ++PI) {
+ if (isLiveIn(r, *PI, LI))
+ return true;
}
return false;
/// registers. 0 - defined in the same block, 1 - first properly dominates
/// second, 2 - second properly dominates first
static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan,
- LiveVariables& LV, unsigned mode) {
+ LiveIntervals& LV, unsigned mode) {
MachineInstr* def = 0;
MachineInstr* kill = 0;
- LiveVariables::VarInfo& First = LV.getVarInfo(a);
- LiveVariables::VarInfo& Second = LV.getVarInfo(b);
+ // The code is still in SSA form at this point, so there is only one
+ // definition per VReg. Thus we can safely use MRI->getVRegDef().
+ const MachineRegisterInfo* MRI = &scan->getParent()->getRegInfo();
bool interference = false;
// Same defining block...
if (mode == 0) {
- if (curr == First.DefInst) {
- // If we find our first DefInst, save it
+ if (curr == MRI->getVRegDef(a)) {
+ // If we find our first definition, save it
if (!def) {
def = curr;
- // If there's already an unkilled DefInst, then
+ // If there's already an unkilled definition, then
// this is an interference
} else if (!kill) {
interference = true;
break;
- // If there's a DefInst followed by a KillInst, then
+ // If there's a definition followed by a KillInst, then
// they can't interfere
} else {
interference = false;
break;
}
// Symmetric with the above
- } else if (curr == Second.DefInst ) {
+ } else if (curr == MRI->getVRegDef(b)) {
if (!def) {
def = curr;
} else if (!kill) {
interference = false;
break;
}
- // Store KillInsts if they match up with the DefInst
- } else if (LV.KillsRegister(curr, a)) {
- if (def == First.DefInst) {
+ // Store KillInsts if they match up with the definition
+ } else if (curr->killsRegister(a)) {
+ if (def == MRI->getVRegDef(a)) {
kill = curr;
- } else if (LV.KillsRegister(curr, b)) {
- if (def == Second.DefInst) {
+ } else if (curr->killsRegister(b)) {
+ if (def == MRI->getVRegDef(b)) {
kill = curr;
}
}
}
// First properly dominates second...
} else if (mode == 1) {
- if (curr == Second.DefInst) {
- // DefInst of second without kill of first is an interference
+ if (curr == MRI->getVRegDef(b)) {
+ // Definition of second without kill of first is an interference
if (!kill) {
interference = true;
break;
- // DefInst after a kill is a non-interference
+ // Definition after a kill is a non-interference
} else {
interference = false;
break;
}
// Save KillInsts of First
- } else if (LV.KillsRegister(curr, a)) {
+ } else if (curr->killsRegister(a)) {
kill = curr;
}
// Symmetric with the above
} else if (mode == 2) {
- if (curr == First.DefInst) {
+ if (curr == MRI->getVRegDef(a)) {
if (!kill) {
interference = true;
break;
interference = false;
break;
}
- } else if (LV.KillsRegister(curr, b)) {
+ } else if (curr->killsRegister(b)) {
kill = curr;
}
}
return interference;
}
-/// processBlock - Eliminate PHIs in the given block
+/// processBlock - Determine how to break up PHIs in the current block. Each
+/// PHI is broken up by some combination of renaming its operands and inserting
+/// copies. This method is responsible for determining which operands receive
+/// which treatment.
void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) {
- LiveVariables& LV = getAnalysis<LiveVariables>();
+ LiveIntervals& LI = getAnalysis<LiveIntervals>();
+ MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
// Holds names that have been added to a set in any PHI within this block
// before the current one.
std::set<unsigned> ProcessedNames;
+ // Iterate over all the PHI nodes in this block
MachineBasicBlock::iterator P = MBB->begin();
while (P != MBB->end() && P->getOpcode() == TargetInstrInfo::PHI) {
- LiveVariables::VarInfo& PHIInfo = LV.getVarInfo(P->getOperand(0).getReg());
-
unsigned DestReg = P->getOperand(0).getReg();
- // Hold the names that are currently in the candidate set.
- std::set<unsigned> PHIUnion;
- std::set<MachineBasicBlock*> UnionedBlocks;
-
+ // Don't both doing PHI elimination for dead PHI's.
+ if (P->registerDefIsDead(DestReg)) {
+ ++P;
+ continue;
+ }
+
+ LiveInterval& PI = LI.getOrCreateInterval(DestReg);
+ unsigned pIdx = LI.getDefIndex(LI.getInstructionIndex(P));
+ VNInfo* PVN = PI.getLiveRangeContaining(pIdx)->valno;
+ PhiValueNumber.insert(std::make_pair(DestReg, PVN->id));
+
+ // PHIUnion is the set of incoming registers to the PHI node that
+ // are going to be renames rather than having copies inserted. This set
+ // is refinded over the course of this function. UnionedBlocks is the set
+ // of corresponding MBBs.
+ std::map<unsigned, unsigned> PHIUnion;
+ SmallPtrSet<MachineBasicBlock*, 8> UnionedBlocks;
+
+ // Iterate over the operands of the PHI node
for (int i = P->getNumOperands() - 1; i >= 2; i-=2) {
unsigned SrcReg = P->getOperand(i-1).getReg();
- LiveVariables::VarInfo& SrcInfo = LV.getVarInfo(SrcReg);
- // Check for trivial interferences
- if (isLiveIn(SrcInfo, P->getParent()) ||
- isLiveOut(PHIInfo, SrcInfo.DefInst->getParent()) ||
- ( PHIInfo.DefInst->getOpcode() == TargetInstrInfo::PHI &&
- isLiveIn(PHIInfo, SrcInfo.DefInst->getParent()) ) ||
+ // Check for trivial interferences via liveness information, allowing us
+ // to avoid extra work later. Any registers that interfere cannot both
+ // be in the renaming set, so choose one and add copies for it instead.
+ // The conditions are:
+ // 1) if the operand is live into the PHI node's block OR
+ // 2) if the PHI node is live out of the operand's defining block OR
+ // 3) if the operand is itself a PHI node and the original PHI is
+ // live into the operand's defining block OR
+ // 4) if the operand is already being renamed for another PHI node
+ // in this block OR
+ // 5) if any two operands are defined in the same block, insert copies
+ // for one of them
+ if (isLiveIn(SrcReg, P->getParent(), LI) ||
+ isLiveOut(P->getOperand(0).getReg(),
+ MRI.getVRegDef(SrcReg)->getParent(), LI) ||
+ ( MRI.getVRegDef(SrcReg)->getOpcode() == TargetInstrInfo::PHI &&
+ isLiveIn(P->getOperand(0).getReg(),
+ MRI.getVRegDef(SrcReg)->getParent(), LI) ) ||
ProcessedNames.count(SrcReg) ||
- UnionedBlocks.count(SrcInfo.DefInst->getParent())) {
+ UnionedBlocks.count(MRI.getVRegDef(SrcReg)->getParent())) {
- // add a copy from a_i to p in Waiting[From[a_i]]
+ // Add a copy for the selected register
MachineBasicBlock* From = P->getOperand(i).getMBB();
Waiting[From].insert(std::make_pair(SrcReg, DestReg));
UsedByAnother.insert(SrcReg);
} else {
- PHIUnion.insert(SrcReg);
- UnionedBlocks.insert(SrcInfo.DefInst->getParent());
+ // Otherwise, add it to the renaming set
+ LiveInterval& I = LI.getOrCreateInterval(SrcReg);
+ unsigned idx = LI.getMBBEndIdx(P->getOperand(i).getMBB());
+ VNInfo* VN = I.getLiveRangeContaining(idx)->valno;
+
+ assert(VN && "No VNInfo for register?");
+
+ PHIUnion.insert(std::make_pair(SrcReg, VN->id));
+ UnionedBlocks.insert(MRI.getVRegDef(SrcReg)->getParent());
}
}
+ // Compute the dominator forest for the renaming set. This is a forest
+ // where the nodes are the registers and the edges represent dominance
+ // relations between the defining blocks of the registers
std::vector<StrongPHIElimination::DomForestNode*> DF =
- computeDomForest(PHIUnion);
+ computeDomForest(PHIUnion, MRI);
- // Walk DomForest to resolve interferences
+ // Walk DomForest to resolve interferences at an inter-block level. This
+ // will remove registers from the renaming set (and insert copies for them)
+ // if interferences are found.
std::vector<std::pair<unsigned, unsigned> > localInterferences;
processPHIUnion(P, PHIUnion, DF, localInterferences);
- // Check for local interferences
+ // If one of the inputs is defined in the same block as the current PHI
+ // then we need to check for a local interference between that input and
+ // the PHI.
+ for (std::map<unsigned, unsigned>::iterator I = PHIUnion.begin(),
+ E = PHIUnion.end(); I != E; ++I)
+ if (MRI.getVRegDef(I->first)->getParent() == P->getParent())
+ localInterferences.push_back(std::make_pair(I->first,
+ P->getOperand(0).getReg()));
+
+ // The dominator forest walk may have returned some register pairs whose
+ // interference cannot be determined from dominator analysis. We now
+ // examine these pairs for local interferences.
for (std::vector<std::pair<unsigned, unsigned> >::iterator I =
localInterferences.begin(), E = localInterferences.end(); I != E; ++I) {
std::pair<unsigned, unsigned> p = *I;
- LiveVariables::VarInfo& FirstInfo = LV.getVarInfo(p.first);
- LiveVariables::VarInfo& SecondInfo = LV.getVarInfo(p.second);
-
MachineDominatorTree& MDT = getAnalysis<MachineDominatorTree>();
// Determine the block we need to scan and the relationship between
// the two registers
MachineBasicBlock* scan = 0;
unsigned mode = 0;
- if (FirstInfo.DefInst->getParent() == SecondInfo.DefInst->getParent()) {
- scan = FirstInfo.DefInst->getParent();
+ if (MRI.getVRegDef(p.first)->getParent() ==
+ MRI.getVRegDef(p.second)->getParent()) {
+ scan = MRI.getVRegDef(p.first)->getParent();
mode = 0; // Same block
- } else if (MDT.dominates(FirstInfo.DefInst->getParent(),
- SecondInfo.DefInst->getParent())) {
- scan = SecondInfo.DefInst->getParent();
+ } else if (MDT.dominates(MRI.getVRegDef(p.first)->getParent(),
+ MRI.getVRegDef(p.second)->getParent())) {
+ scan = MRI.getVRegDef(p.second)->getParent();
mode = 1; // First dominates second
} else {
- scan = FirstInfo.DefInst->getParent();
+ scan = MRI.getVRegDef(p.first)->getParent();
mode = 2; // Second dominates first
}
// If there's an interference, we need to insert copies
- if (interferes(p.first, p.second, scan, LV, mode)) {
+ if (interferes(p.first, p.second, scan, LI, mode)) {
// Insert copies for First
for (int i = P->getNumOperands() - 1; i >= 2; i-=2) {
if (P->getOperand(i-1).getReg() == p.first) {
}
}
- // Cache renaming information
+ // Add the renaming set for this PHI node to our overall renaming information
RenameSets.insert(std::make_pair(P->getOperand(0).getReg(), PHIUnion));
- ProcessedNames.insert(PHIUnion.begin(), PHIUnion.end());
+ // Remember which registers are already renamed, so that we don't try to
+ // rename them for another PHI node in this block
+ for (std::map<unsigned, unsigned>::iterator I = PHIUnion.begin(),
+ E = PHIUnion.end(); I != E; ++I)
+ ProcessedNames.insert(I->first);
+
++P;
}
}
-/// processPHIUnion - Take a set of candidate registers to be coallesced when
+/// processPHIUnion - Take a set of candidate registers to be coalesced when
/// decomposing the PHI instruction. Use the DominanceForest to remove the ones
/// that are known to interfere, and flag others that need to be checked for
/// local interferences.
void StrongPHIElimination::processPHIUnion(MachineInstr* Inst,
- std::set<unsigned>& PHIUnion,
+ std::map<unsigned, unsigned>& PHIUnion,
std::vector<StrongPHIElimination::DomForestNode*>& DF,
std::vector<std::pair<unsigned, unsigned> >& locals) {
std::vector<DomForestNode*> worklist(DF.begin(), DF.end());
SmallPtrSet<DomForestNode*, 4> visited;
- LiveVariables& LV = getAnalysis<LiveVariables>();
+ // Code is still in SSA form, so we can use MRI::getVRegDef()
+ MachineRegisterInfo& MRI = Inst->getParent()->getParent()->getRegInfo();
+
+ LiveIntervals& LI = getAnalysis<LiveIntervals>();
unsigned DestReg = Inst->getOperand(0).getReg();
// DF walk on the DomForest
while (!worklist.empty()) {
DomForestNode* DFNode = worklist.back();
- LiveVariables::VarInfo& Info = LV.getVarInfo(DFNode->getReg());
visited.insert(DFNode);
bool inserted = false;
for (DomForestNode::iterator CI = DFNode->begin(), CE = DFNode->end();
CI != CE; ++CI) {
DomForestNode* child = *CI;
- LiveVariables::VarInfo& CInfo = LV.getVarInfo(child->getReg());
-
- if (isLiveOut(Info, CInfo.DefInst->getParent())) {
+
+ // If the current node is live-out of the defining block of one of its
+ // children, insert a copy for it. NOTE: The paper actually calls for
+ // a more elaborate heuristic for determining whether to insert copies
+ // for the child or the parent. In the interest of simplicity, we're
+ // just always choosing the parent.
+ if (isLiveOut(DFNode->getReg(),
+ MRI.getVRegDef(child->getReg())->getParent(), LI)) {
// Insert copies for parent
for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
if (Inst->getOperand(i-1).getReg() == DFNode->getReg()) {
PHIUnion.erase(SrcReg);
}
}
- } else if (isLiveIn(Info, CInfo.DefInst->getParent()) ||
- Info.DefInst->getParent() == CInfo.DefInst->getParent()) {
+
+ // If a node is live-in to the defining block of one of its children, but
+ // not live-out, then we need to scan that block for local interferences.
+ } else if (isLiveIn(DFNode->getReg(),
+ MRI.getVRegDef(child->getReg())->getParent(), LI) ||
+ MRI.getVRegDef(DFNode->getReg())->getParent() ==
+ MRI.getVRegDef(child->getReg())->getParent()) {
// Add (p, c) to possible local interferences
locals.push_back(std::make_pair(DFNode->getReg(), child->getReg()));
}
map.insert(std::make_pair(I->first, I->first));
map.insert(std::make_pair(I->second, I->second));
- if (!UsedByAnother.count(I->first)) {
+ if (!UsedByAnother.count(I->second)) {
worklist.insert(*I);
// Avoid iterator invalidation
}
}
- LiveVariables& LV = getAnalysis<LiveVariables>();
+ LiveIntervals& LI = getAnalysis<LiveIntervals>();
MachineFunction* MF = MBB->getParent();
+ MachineRegisterInfo& MRI = MF->getRegInfo();
const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
// Iterate over the worklist, inserting copies
const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(curr.first);
- if (isLiveOut(LV.getVarInfo(curr.second), MBB)) {
+ if (isLiveOut(curr.second, MBB, LI)) {
// Create a temporary
unsigned t = MF->getRegInfo().createVirtualRegister(RC);
// Insert copy from curr.second to a temporary at
// the Phi defining curr.second
- LiveVariables::VarInfo VI = LV.getVarInfo(curr.second);
- MachineBasicBlock::iterator PI = VI.DefInst;
- TII->copyRegToReg(*VI.DefInst->getParent(), PI, t,
+ MachineBasicBlock::iterator PI = MRI.getVRegDef(curr.second);
+ TII->copyRegToReg(*PI->getParent(), PI, t,
curr.second, RC, RC);
// Push temporary on Stacks
/// InsertCopies - insert copies into MBB and all of its successors
void StrongPHIElimination::InsertCopies(MachineBasicBlock* MBB,
- std::set<MachineBasicBlock*>& visited) {
+ SmallPtrSet<MachineBasicBlock*, 16>& visited) {
visited.insert(MBB);
std::set<unsigned> pushed;
Stacks[*I].pop_back();
}
+/// ComputeUltimateVN - Assuming we are going to join two live intervals,
+/// compute what the resultant value numbers for each value in the input two
+/// ranges will be. This is complicated by copies between the two which can
+/// and will commonly cause multiple value numbers to be merged into one.
+///
+/// VN is the value number that we're trying to resolve. InstDefiningValue
+/// keeps track of the new InstDefiningValue assignment for the result
+/// LiveInterval. ThisFromOther/OtherFromThis are sets that keep track of
+/// whether a value in this or other is a copy from the opposite set.
+/// ThisValNoAssignments/OtherValNoAssignments keep track of value #'s that have
+/// already been assigned.
+///
+/// ThisFromOther[x] - If x is defined as a copy from the other interval, this
+/// contains the value number the copy is from.
+///
+static unsigned ComputeUltimateVN(VNInfo *VNI,
+ SmallVector<VNInfo*, 16> &NewVNInfo,
+ DenseMap<VNInfo*, VNInfo*> &ThisFromOther,
+ DenseMap<VNInfo*, VNInfo*> &OtherFromThis,
+ SmallVector<int, 16> &ThisValNoAssignments,
+ SmallVector<int, 16> &OtherValNoAssignments) {
+ unsigned VN = VNI->id;
+
+ // If the VN has already been computed, just return it.
+ if (ThisValNoAssignments[VN] >= 0)
+ return ThisValNoAssignments[VN];
+// assert(ThisValNoAssignments[VN] != -2 && "Cyclic case?");
+
+ // If this val is not a copy from the other val, then it must be a new value
+ // number in the destination.
+ DenseMap<VNInfo*, VNInfo*>::iterator I = ThisFromOther.find(VNI);
+ if (I == ThisFromOther.end()) {
+ NewVNInfo.push_back(VNI);
+ return ThisValNoAssignments[VN] = NewVNInfo.size()-1;
+ }
+ VNInfo *OtherValNo = I->second;
+
+ // Otherwise, this *is* a copy from the RHS. If the other side has already
+ // been computed, return it.
+ if (OtherValNoAssignments[OtherValNo->id] >= 0)
+ return ThisValNoAssignments[VN] = OtherValNoAssignments[OtherValNo->id];
+
+ // Mark this value number as currently being computed, then ask what the
+ // ultimate value # of the other value is.
+ ThisValNoAssignments[VN] = -2;
+ unsigned UltimateVN =
+ ComputeUltimateVN(OtherValNo, NewVNInfo, OtherFromThis, ThisFromOther,
+ OtherValNoAssignments, ThisValNoAssignments);
+ return ThisValNoAssignments[VN] = UltimateVN;
+}
+
+void StrongPHIElimination::mergeLiveIntervals(unsigned primary,
+ unsigned secondary,
+ unsigned secondaryVN) {
+
+ LiveIntervals& LI = getAnalysis<LiveIntervals>();
+ LiveInterval& LHS = LI.getOrCreateInterval(primary);
+ LiveInterval& RHS = LI.getOrCreateInterval(secondary);
+
+ // Compute the final value assignment, assuming that the live ranges can be
+ // coalesced.
+ SmallVector<int, 16> LHSValNoAssignments;
+ SmallVector<int, 16> RHSValNoAssignments;
+ SmallVector<VNInfo*, 16> NewVNInfo;
+
+ LHSValNoAssignments.resize(LHS.getNumValNums(), -1);
+ RHSValNoAssignments.resize(RHS.getNumValNums(), -1);
+ NewVNInfo.reserve(LHS.getNumValNums() + RHS.getNumValNums());
+
+ for (LiveInterval::vni_iterator I = LHS.vni_begin(), E = LHS.vni_end();
+ I != E; ++I) {
+ VNInfo *VNI = *I;
+ unsigned VN = VNI->id;
+ if (LHSValNoAssignments[VN] >= 0 || VNI->def == ~1U)
+ continue;
+
+ NewVNInfo.push_back(VNI);
+ LHSValNoAssignments[VN] = NewVNInfo.size()-1;
+ }
+
+ for (LiveInterval::vni_iterator I = RHS.vni_begin(), E = RHS.vni_end();
+ I != E; ++I) {
+ VNInfo *VNI = *I;
+ unsigned VN = VNI->id;
+ if (RHSValNoAssignments[VN] >= 0 || VNI->def == ~1U)
+ continue;
+
+ NewVNInfo.push_back(VNI);
+ RHSValNoAssignments[VN] = NewVNInfo.size()-1;
+ }
+
+ // If we get here, we know that we can coalesce the live ranges. Ask the
+ // intervals to coalesce themselves now.
+
+ LHS.join(RHS, &LHSValNoAssignments[0], &RHSValNoAssignments[0], NewVNInfo);
+ LI.removeInterval(secondary);
+
+ // The valno that was previously the input to the PHI node
+ // now has a PHIKill.
+ LHS.getValNumInfo(RHSValNoAssignments[secondaryVN])->hasPHIKill = true;
+}
+
bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) {
+ LiveIntervals& LI = getAnalysis<LiveIntervals>();
+
// Compute DFS numbers of each block
computeDFS(Fn);
// Insert copies
// FIXME: This process should probably preserve LiveVariables
- std::set<MachineBasicBlock*> visited;
+ SmallPtrSet<MachineBasicBlock*, 16> visited;
InsertCopies(Fn.begin(), visited);
// Perform renaming
- typedef std::map<unsigned, std::set<unsigned> > RenameSetType;
+ typedef std::map<unsigned, std::map<unsigned, unsigned> > RenameSetType;
for (RenameSetType::iterator I = RenameSets.begin(), E = RenameSets.end();
I != E; ++I)
- for (std::set<unsigned>::iterator SI = I->second.begin(),
- SE = I->second.end(); SI != SE; ++SI)
- Fn.getRegInfo().replaceRegWith(*SI, I->first);
+ for (std::map<unsigned, unsigned>::iterator SI = I->second.begin(),
+ SE = I->second.end(); SI != SE; ++SI) {
+ mergeLiveIntervals(I->first, SI->first, SI->second);
+ Fn.getRegInfo().replaceRegWith(SI->first, I->first);
+ }
// FIXME: Insert last-minute copies
// Remove PHIs
- for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
+ std::vector<MachineInstr*> phis;
+ for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
for (MachineBasicBlock::iterator BI = I->begin(), BE = I->end();
BI != BE; ++BI)
if (BI->getOpcode() == TargetInstrInfo::PHI)
- BI->eraseFromParent();
+ phis.push_back(BI);
+ }
- return false;
+ for (std::vector<MachineInstr*>::iterator I = phis.begin(), E = phis.end();
+ I != E; ) {
+ MachineInstr* PInstr = *(I++);
+
+ // If this is a dead PHI node, then remove it from LiveIntervals.
+ unsigned DestReg = PInstr->getOperand(0).getReg();
+ LiveInterval& PI = LI.getInterval(DestReg);
+ if (PInstr->registerDefIsDead(DestReg)) {
+ if (PI.containsOneValue()) {
+ LI.removeInterval(DestReg);
+ } else {
+ unsigned idx = LI.getDefIndex(LI.getInstructionIndex(PInstr));
+ PI.removeRange(*PI.getLiveRangeContaining(idx), true);
+ }
+ } else {
+ // If the PHI is not dead, then the valno defined by the PHI
+ // now has an unknown def.
+ unsigned idx = LI.getDefIndex(LI.getInstructionIndex(PInstr));
+ PI.getLiveRangeContaining(idx)->valno->def = ~0U;
+ }
+
+ LI.RemoveMachineInstrFromMaps(PInstr);
+ PInstr->eraseFromParent();
+ }
+
+ LI.computeNumbering();
+
+ return true;
}
projects / oota-llvm.git / blobdiff