Formatting - no functional change.

[oota-llvm.git] / lib / CodeGen / TargetInstrInfoImpl.cpp

diff --git a/lib/CodeGen/TargetInstrInfoImpl.cpp b/lib/CodeGen/TargetInstrInfoImpl.cpp
index 4e7fec364ddbeaf90489aadb02f697befc20a07a..e4142423cecadaece154c58fefcb187cd8685001 100644 (file)
--- a/lib/CodeGen/TargetInstrInfoImpl.cpp
+++ b/lib/CodeGen/TargetInstrInfoImpl.cpp
@@ -13,6 +13,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/ADT/SmallVector.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 using namespace llvm;
@@ -21,7 +22,7 @@ using namespace llvm;
 // operand 1 and 2.
 MachineInstr *TargetInstrInfoImpl::commuteInstruction(MachineInstr *MI,
                                                       bool NewMI) const {
-  assert(MI->getOperand(1).isRegister() && MI->getOperand(2).isRegister() &&
+  assert(MI->getOperand(1).isReg() && MI->getOperand(2).isReg() &&
          "This only knows how to commute register operands so far");
   unsigned Reg1 = MI->getOperand(1).getReg();
   unsigned Reg2 = MI->getOperand(2).getReg();
@@ -63,7 +64,7 @@ MachineInstr *TargetInstrInfoImpl::commuteInstruction(MachineInstr *MI,
 /// two-address instruction.
 bool TargetInstrInfoImpl::CommuteChangesDestination(MachineInstr *MI,
                                                     unsigned &OpIdx) const{
-  assert(MI->getOperand(1).isRegister() && MI->getOperand(2).isRegister() &&
+  assert(MI->getOperand(1).isReg() && MI->getOperand(2).isReg() &&
          "This only knows how to commute register operands so far");
   if (MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) {
     // Must be two address instruction!
@@ -77,7 +78,7 @@ bool TargetInstrInfoImpl::CommuteChangesDestination(MachineInstr *MI,
 
 
 bool TargetInstrInfoImpl::PredicateInstruction(MachineInstr *MI,
-                                const std::vector<MachineOperand> &Pred) const {
+                            const SmallVectorImpl<MachineOperand> &Pred) const {
   bool MadeChange = false;
   const TargetInstrDesc &TID = MI->getDesc();
   if (!TID.isPredicable())
@@ -117,7 +118,8 @@ TargetInstrInfoImpl::GetFunctionSizeInBytes(const MachineFunction &MF) const {
   for (MachineFunction::const_iterator MBBI = MF.begin(), E = MF.end();
        MBBI != E; ++MBBI) {
     const MachineBasicBlock &MBB = *MBBI;
-    for (MachineBasicBlock::const_iterator I = MBB.begin(),E = MBB.end(); I != E; ++I)
+    for (MachineBasicBlock::const_iterator I = MBB.begin(),E = MBB.end();
+         I != E; ++I)
       FnSize += GetInstSizeInBytes(I);
   }
   return FnSize;