TwoAddressInstructionPass() : MachineFunctionPass((intptr_t)&ID) {}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addRequired<LiveVariables>();
AU.addPreserved<LiveVariables>();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
KillMO->setIsKill(false);
KillMO = MI->findRegisterUseOperand(SavedReg, false, TRI);
KillMO->setIsKill(true);
- LiveVariables::VarInfo& VarInfo = LV->getVarInfo(SavedReg);
- VarInfo.removeKill(KillMI);
- VarInfo.Kills.push_back(MI);
+
+ if (LV)
+ LV->replaceKillInstruction(SavedReg, KillMI, MI);
// Move instruction to its destination.
MBB->remove(MI);
MRI = &MF.getRegInfo();
TII = TM.getInstrInfo();
TRI = TM.getRegisterInfo();
- LV = &getAnalysis<LiveVariables>();
+ LV = getAnalysisToUpdate<LiveVariables>();
bool MadeChange = false;
DOUT << "2addr: COMMUTED TO: " << *NewMI;
// If the instruction changed to commute it, update livevar.
if (NewMI != mi) {
- LV->instructionChanged(mi, NewMI); // Update live variables
+ if (LV)
+ // Update live variables
+ LV->replaceKillInstruction(regC, mi, NewMI);
+
mbbi->insert(mi, NewMI); // Insert the new inst
mbbi->erase(mi); // Nuke the old inst.
mi = NewMI;
assert(TID.getOperandConstraint(i, TOI::TIED_TO) == -1);
#endif
- MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, *LV);
+ MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV);
if (NewMI) {
DOUT << "2addr: CONVERTING 2-ADDR: " << *mi;
DOUT << "2addr: TO 3-ADDR: " << *NewMI;
DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(*cerr.stream(), &TM));
// Update live variables for regB.
- LiveVariables::VarInfo& varInfoB = LV->getVarInfo(regB);
+ if (LV) {
+ LiveVariables::VarInfo& varInfoB = LV->getVarInfo(regB);
- // regB is used in this BB.
- varInfoB.UsedBlocks[mbbi->getNumber()] = true;
+ // regB is used in this BB.
+ varInfoB.UsedBlocks[mbbi->getNumber()] = true;
- if (LV->removeVirtualRegisterKilled(regB, mbbi, mi))
- LV->addVirtualRegisterKilled(regB, prevMi);
-
- if (LV->removeVirtualRegisterDead(regB, mbbi, mi))
- LV->addVirtualRegisterDead(regB, prevMi);
+ if (LV->removeVirtualRegisterKilled(regB, mi))
+ LV->addVirtualRegisterKilled(regB, prevMi);
+ if (LV->removeVirtualRegisterDead(regB, mi))
+ LV->addVirtualRegisterDead(regB, prevMi);
+ }
+
// Replace all occurences of regB with regA.
for (unsigned i = 0, e = mi->getNumOperands(); i != e; ++i) {
if (mi->getOperand(i).isRegister() &&