Correctly clone FlaggedNodes.

[oota-llvm.git] / lib / CodeGen / TwoAddressInstructionPass.cpp

diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 9eb3d7a4deb0005950bf4cf412b535eb4e577ee9..5d8781b871aadeda19f5dba7ff8e81f67449d620 100644 (file)
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -34,7 +34,7 @@
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/Debug.h"
@@ -93,11 +93,11 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
        mbbi != mbbe; ++mbbi) {
     for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
          mi != me; ++mi) {
-      const TargetInstrDescriptor *TID = mi->getDesc();
+      const TargetInstrDesc &TID = mi->getDesc();
 
       bool FirstTied = true;
-      for (unsigned si = 1, e = TID->numOperands; si < e; ++si) {
-        int ti = TID->getOperandConstraint(si, TOI::TIED_TO);
+      for (unsigned si = 1, e = TID.getNumOperands(); si < e; ++si) {
+        int ti = TID.getOperandConstraint(si, TOI::TIED_TO);
         if (ti == -1)
           continue;
 
@@ -121,8 +121,8 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
           unsigned regA = mi->getOperand(ti).getReg();
           unsigned regB = mi->getOperand(si).getReg();
 
-          assert(MRegisterInfo::isVirtualRegister(regA) &&
-                 MRegisterInfo::isVirtualRegister(regB) &&
+          assert(TargetRegisterInfo::isVirtualRegister(regA) &&
+                 TargetRegisterInfo::isVirtualRegister(regB) &&
                  "cannot update physical register live information");
 
 #ifndef NDEBUG
@@ -139,16 +139,16 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
           // rearrange the code to make it so.  Making it the killing user will
           // allow us to coalesce A and B together, eliminating the copy we are
           // about to insert.
-          if (!LV.KillsRegister(mi, regB)) {
+          if (!mi->killsRegister(regB)) {
             // If this instruction is commutative, check to see if C dies.  If
             // so, swap the B and C operands.  This makes the live ranges of A
             // and C joinable.
             // FIXME: This code also works for A := B op C instructions.
-            if ((TID->Flags & M_COMMUTABLE) && mi->getNumOperands() >= 3) {
+            if (TID.isCommutable() && mi->getNumOperands() >= 3) {
               assert(mi->getOperand(3-si).isRegister() &&
                      "Not a proper commutative instruction!");
               unsigned regC = mi->getOperand(3-si).getReg();
-              if (LV.KillsRegister(mi, regC)) {
+              if (mi->killsRegister(regC)) {
                 DOUT << "2addr: COMMUTING  : " << *mi;
                 MachineInstr *NewMI = TII.commuteInstruction(mi);
                 if (NewMI == 0) {
@@ -172,12 +172,12 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
 
             // If this instruction is potentially convertible to a true
             // three-address instruction,
-            if (TID->Flags & M_CONVERTIBLE_TO_3_ADDR) {
+            if (TID.isConvertibleTo3Addr()) {
               // FIXME: This assumes there are no more operands which are tied
               // to another register.
 #ifndef NDEBUG
-              for (unsigned i = si+1, e = TID->numOperands; i < e; ++i)
-                assert(TID->getOperandConstraint(i, TOI::TIED_TO) == -1);
+              for (unsigned i = si+1, e = TID.getNumOperands(); i < e; ++i)
+                assert(TID.getOperandConstraint(i, TOI::TIED_TO) == -1);
 #endif
 
               if (MachineInstr *New = TII.convertToThreeAddress(mbbi, mi, LV)) {
@@ -199,10 +199,6 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
           MachineBasicBlock::iterator prevMi = prior(mi);
           DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(*cerr.stream(), &TM));
 
-          // Update live variables for regA
-          LiveVariables::VarInfo& varInfo = LV.getVarInfo(regA);
-          varInfo.DefInst = prevMi;
-
           // update live variables for regB
           LiveVariables::VarInfo& varInfoB = LV.getVarInfo(regB);
           // regB is used in this BB.