#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
#include <algorithm>
using namespace llvm;
namespace {
- Statistic<> NumSpills("spiller", "Number of register spills");
- Statistic<> NumStores("spiller", "Number of stores added");
- Statistic<> NumLoads ("spiller", "Number of loads added");
- Statistic<> NumReused("spiller", "Number of values reused");
- Statistic<> NumDSE ("spiller", "Number of dead stores elided");
- Statistic<> NumDCE ("spiller", "Number of copies elided");
+ static Statistic<> NumSpills("spiller", "Number of register spills");
+ static Statistic<> NumStores("spiller", "Number of stores added");
+ static Statistic<> NumLoads ("spiller", "Number of loads added");
+ static Statistic<> NumReused("spiller", "Number of values reused");
+ static Statistic<> NumDSE ("spiller", "Number of dead stores elided");
+ static Statistic<> NumDCE ("spiller", "Number of copies elided");
enum SpillerName { simple, local };
- cl::opt<SpillerName>
+ static cl::opt<SpillerName>
SpillerOpt("spiller",
cl::desc("Spiller to use: (default: local)"),
cl::Prefix,
// VirtRegMap implementation
//===----------------------------------------------------------------------===//
+VirtRegMap::VirtRegMap(MachineFunction &mf)
+ : TII(*mf.getTarget().getInstrInfo()), MF(mf),
+ Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT) {
+ grow();
+}
+
void VirtRegMap::grow() {
Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg());
Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg());
}
ModRef MRInfo;
- if (!OldMI->getOperand(OpNo).isDef()) {
- assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?");
- MRInfo = isRef;
+ if (TII.getOperandConstraint(OldMI->getOpcode(), OpNo,
+ TargetInstrInfo::TIED_TO)) {
+ // Folded a two-address operand.
+ MRInfo = isModRef;
+ } else if (OldMI->getOperand(OpNo).isDef()) {
+ MRInfo = isMod;
} else {
- MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod;
+ MRInfo = isRef;
}
// add new memory reference
Spiller::~Spiller() {}
namespace {
- struct SimpleSpiller : public Spiller {
- bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap &VRM);
+ struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
+ bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM);
};
}
-bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF,
- const VirtRegMap &VRM) {
+bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
DEBUG(std::cerr << "********** Function: "
<< MF.getFunction()->getName() << '\n');
}
}
PhysRegsUsed[PhysReg] = true;
- MI.SetMachineOperandReg(i, PhysReg);
+ MI.getOperand(i).setReg(PhysReg);
} else {
PhysRegsUsed[MO.getReg()] = true;
}
/// block to attempt to keep spills in registers as much as possible for
/// blocks that have low register pressure (the vreg may be spilled due to
/// register pressure in other blocks).
- class LocalSpiller : public Spiller {
+ class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
const MRegisterInfo *MRI;
const TargetInstrInfo *TII;
public:
- bool runOnMachineFunction(MachineFunction &MF, const VirtRegMap &VRM) {
+ bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
MRI = MF.getTarget().getRegisterInfo();
TII = MF.getTarget().getInstrInfo();
DEBUG(std::cerr << "\n**** Local spiller rewriting function '"
return true;
}
private:
- void RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM);
+ void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots,
std::multimap<unsigned, int> &PhysRegs);
void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots,
/// per-stack-slot basis as the low bit in the value of the SpillSlotsAvailable
/// entries. The predicate 'canClobberPhysReg()' checks this bit and
/// addAvailable sets it if.
-class AvailableSpills {
+namespace {
+class VISIBILITY_HIDDEN AvailableSpills {
const MRegisterInfo *MRI;
const TargetInstrInfo *TII;
return I->second >> 1; // Remove the CanClobber bit.
return 0;
}
+
+ const MRegisterInfo *getRegInfo() const { return MRI; }
/// addAvailable - Mark that the specified stack slot is available in the
/// specified physreg. If CanClobber is true, the physreg can be modified at
/// any time without changing the semantics of the program.
void addAvailable(int Slot, unsigned Reg, bool CanClobber = true) {
+ // If this stack slot is thought to be available in some other physreg,
+ // remove its record.
+ ModifyStackSlot(Slot);
+
PhysRegsAvailable.insert(std::make_pair(Reg, Slot));
- SpillSlotsAvailable[Slot] = (Reg << 1) | CanClobber;
+ SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber;
DEBUG(std::cerr << "Remembering SS#" << Slot << " in physreg "
<< MRI->getName(Reg) << "\n");
/// for this slot lives in (as the previous value is dead now).
void ModifyStackSlot(int Slot);
};
+}
/// ClobberPhysRegOnly - This is called when the specified physreg changes
/// value. We use this to invalidate any info about stuff we thing lives in it.
: Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr),
VirtReg(vreg) {}
};
+
+ /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
+ /// is reused instead of reloaded.
+ class VISIBILITY_HIDDEN ReuseInfo {
+ MachineInstr &MI;
+ std::vector<ReusedOp> Reuses;
+ public:
+ ReuseInfo(MachineInstr &mi) : MI(mi) {}
+
+ bool hasReuses() const {
+ return !Reuses.empty();
+ }
+
+ /// addReuse - If we choose to reuse a virtual register that is already
+ /// available instead of reloading it, remember that we did so.
+ void addReuse(unsigned OpNo, unsigned StackSlot,
+ unsigned PhysRegReused, unsigned AssignedPhysReg,
+ unsigned VirtReg) {
+ // If the reload is to the assigned register anyway, no undo will be
+ // required.
+ if (PhysRegReused == AssignedPhysReg) return;
+
+ // Otherwise, remember this.
+ Reuses.push_back(ReusedOp(OpNo, StackSlot, PhysRegReused,
+ AssignedPhysReg, VirtReg));
+ }
+
+ /// GetRegForReload - We are about to emit a reload into PhysReg. If there
+ /// is some other operand that is using the specified register, either pick
+ /// a new register to use, or evict the previous reload and use this reg.
+ unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
+ AvailableSpills &Spills,
+ std::map<int, MachineInstr*> &MaybeDeadStores) {
+ if (Reuses.empty()) return PhysReg; // This is most often empty.
+
+ for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
+ ReusedOp &Op = Reuses[ro];
+ // If we find some other reuse that was supposed to use this register
+ // exactly for its reload, we can change this reload to use ITS reload
+ // register.
+ if (Op.PhysRegReused == PhysReg) {
+ // Yup, use the reload register that we didn't use before.
+ unsigned NewReg = Op.AssignedPhysReg;
+
+ // Remove the record for the previous reuse. We know it can never be
+ // invalidated now.
+ Reuses.erase(Reuses.begin()+ro);
+ return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores);
+ } else {
+ // Otherwise, we might also have a problem if a previously reused
+ // value aliases the new register. If so, codegen the previous reload
+ // and use this one.
+ unsigned PRRU = Op.PhysRegReused;
+ const MRegisterInfo *MRI = Spills.getRegInfo();
+ if (MRI->areAliases(PRRU, PhysReg)) {
+ // Okay, we found out that an alias of a reused register
+ // was used. This isn't good because it means we have
+ // to undo a previous reuse.
+ MachineBasicBlock *MBB = MI->getParent();
+ const TargetRegisterClass *AliasRC =
+ MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
+
+ // Copy Op out of the vector and remove it, we're going to insert an
+ // explicit load for it.
+ ReusedOp NewOp = Op;
+ Reuses.erase(Reuses.begin()+ro);
+
+ // Ok, we're going to try to reload the assigned physreg into the
+ // slot that we were supposed to in the first place. However, that
+ // register could hold a reuse. Check to see if it conflicts or
+ // would prefer us to use a different register.
+ unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
+ MI, Spills, MaybeDeadStores);
+
+ MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
+ NewOp.StackSlot, AliasRC);
+ Spills.ClobberPhysReg(NewPhysReg);
+ Spills.ClobberPhysReg(NewOp.PhysRegReused);
+
+ // Any stores to this stack slot are not dead anymore.
+ MaybeDeadStores.erase(NewOp.StackSlot);
+
+ MI->getOperand(NewOp.Operand).setReg(NewPhysReg);
+
+ Spills.addAvailable(NewOp.StackSlot, NewPhysReg);
+ ++NumLoads;
+ DEBUG(MachineBasicBlock::iterator MII = MI;
+ std::cerr << '\t' << *prior(MII));
+
+ DEBUG(std::cerr << "Reuse undone!\n");
+ --NumReused;
+
+ // Finally, PhysReg is now available, go ahead and use it.
+ return PhysReg;
+ }
+ }
+ }
+ return PhysReg;
+ }
+ };
}
/// rewriteMBB - Keep track of which spills are available even after the
/// register allocator is done with them. If possible, avoid reloading vregs.
-void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
+void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n");
// that we can choose to reuse the physregs instead of emitting reloads.
AvailableSpills Spills(MRI, TII);
- std::vector<ReusedOp> ReusedOperands;
-
- // DefAndUseVReg - When we see a def&use operand that is spilled, keep track
- // of it. ".first" is the machine operand index (should always be 0 for now),
- // and ".second" is the virtual register that is spilled.
- std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg;
-
// MaybeDeadStores - When we need to write a value back into a stack slot,
// keep track of the inserted store. If the stack slot value is never read
// (because the value was used from some available register, for example), and
MachineInstr &MI = *MII;
MachineBasicBlock::iterator NextMII = MII; ++NextMII;
- ReusedOperands.clear();
- DefAndUseVReg.clear();
-
+ /// ReusedOperands - Keep track of operand reuse in case we need to undo
+ /// reuse.
+ ReuseInfo ReusedOperands(MI);
+
// Process all of the spilled uses and all non spilled reg references.
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI.getOperand(i);
// This virtual register was assigned a physreg!
unsigned Phys = VRM.getPhys(VirtReg);
PhysRegsUsed[Phys] = true;
- MI.SetMachineOperandReg(i, Phys);
+ MI.getOperand(i).setReg(Phys);
continue;
}
if (!MO.isUse())
continue; // Handle defs in the loop below (handle use&def here though)
- // If this is both a def and a use, we need to emit a store to the
- // stack slot after the instruction. Keep track of D&U operands
- // because we are about to change it to a physreg here.
- if (MO.isDef()) {
- // Remember that this was a def-and-use operand, and that the
- // stack slot is live after this instruction executes.
- DefAndUseVReg.push_back(std::make_pair(i, VirtReg));
- }
-
int StackSlot = VRM.getStackSlot(VirtReg);
unsigned PhysReg;
// Check to see if this stack slot is available.
- if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot)) &&
- // Don't reuse it for a def&use operand if we aren't allowed to change
- // the physreg!
- (!MO.isDef() || Spills.canClobberPhysReg(StackSlot))) {
- // If this stack slot value is already available, reuse it!
- DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
- << MRI->getName(PhysReg) << " for vreg"
- << VirtReg <<" instead of reloading into physreg "
- << MRI->getName(VRM.getPhys(VirtReg)) << "\n");
- MI.SetMachineOperandReg(i, PhysReg);
-
- // The only technical detail we have is that we don't know that
- // PhysReg won't be clobbered by a reloaded stack slot that occurs
- // later in the instruction. In particular, consider 'op V1, V2'.
- // If V1 is available in physreg R0, we would choose to reuse it
- // here, instead of reloading it into the register the allocator
- // indicated (say R1). However, V2 might have to be reloaded
- // later, and it might indicate that it needs to live in R0. When
- // this occurs, we need to have information available that
- // indicates it is safe to use R1 for the reload instead of R0.
+ if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot))) {
+
+ // This spilled operand might be part of a two-address operand. If this
+ // is the case, then changing it will necessarily require changing the
+ // def part of the instruction as well. However, in some cases, we
+ // aren't allowed to modify the reused register. If none of these cases
+ // apply, reuse it.
+ bool CanReuse = true;
+ int ti = TII->getOperandConstraint(MI.getOpcode(), i,
+ TargetInstrInfo::TIED_TO);
+ if (ti != -1 &&
+ MI.getOperand(ti).isReg() &&
+ MI.getOperand(ti).getReg() == VirtReg) {
+ // Okay, we have a two address operand. We can reuse this physreg as
+ // long as we are allowed to clobber the value.
+ CanReuse = Spills.canClobberPhysReg(StackSlot);
+ }
+
+ if (CanReuse) {
+ // If this stack slot value is already available, reuse it!
+ DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
+ << MRI->getName(PhysReg) << " for vreg"
+ << VirtReg <<" instead of reloading into physreg "
+ << MRI->getName(VRM.getPhys(VirtReg)) << "\n");
+ MI.getOperand(i).setReg(PhysReg);
+
+ // The only technical detail we have is that we don't know that
+ // PhysReg won't be clobbered by a reloaded stack slot that occurs
+ // later in the instruction. In particular, consider 'op V1, V2'.
+ // If V1 is available in physreg R0, we would choose to reuse it
+ // here, instead of reloading it into the register the allocator
+ // indicated (say R1). However, V2 might have to be reloaded
+ // later, and it might indicate that it needs to live in R0. When
+ // this occurs, we need to have information available that
+ // indicates it is safe to use R1 for the reload instead of R0.
+ //
+ // To further complicate matters, we might conflict with an alias,
+ // or R0 and R1 might not be compatible with each other. In this
+ // case, we actually insert a reload for V1 in R1, ensuring that
+ // we can get at R0 or its alias.
+ ReusedOperands.addReuse(i, StackSlot, PhysReg,
+ VRM.getPhys(VirtReg), VirtReg);
+ ++NumReused;
+ continue;
+ }
+
+ // Otherwise we have a situation where we have a two-address instruction
+ // whose mod/ref operand needs to be reloaded. This reload is already
+ // available in some register "PhysReg", but if we used PhysReg as the
+ // operand to our 2-addr instruction, the instruction would modify
+ // PhysReg. This isn't cool if something later uses PhysReg and expects
+ // to get its initial value.
//
- // To further complicate matters, we might conflict with an alias,
- // or R0 and R1 might not be compatible with each other. In this
- // case, we actually insert a reload for V1 in R1, ensuring that
- // we can get at R0 or its alias.
- ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg,
- VRM.getPhys(VirtReg), VirtReg));
+ // To avoid this problem, and to avoid doing a load right after a store,
+ // we emit a copy from PhysReg into the designated register for this
+ // operand.
+ unsigned DesignatedReg = VRM.getPhys(VirtReg);
+ assert(DesignatedReg && "Must map virtreg to physreg!");
+
+ // Note that, if we reused a register for a previous operand, the
+ // register we want to reload into might not actually be
+ // available. If this occurs, use the register indicated by the
+ // reuser.
+ if (ReusedOperands.hasReuses())
+ DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
+ Spills, MaybeDeadStores);
+
+ // If the mapped designated register is actually the physreg we have
+ // incoming, we don't need to inserted a dead copy.
+ if (DesignatedReg == PhysReg) {
+ // If this stack slot value is already available, reuse it!
+ DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
+ << MRI->getName(PhysReg) << " for vreg"
+ << VirtReg
+ << " instead of reloading into same physreg.\n");
+ MI.getOperand(i).setReg(PhysReg);
+ ++NumReused;
+ continue;
+ }
+
+ const TargetRegisterClass* RC =
+ MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
+
+ PhysRegsUsed[DesignatedReg] = true;
+ MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC);
+
+ // This invalidates DesignatedReg.
+ Spills.ClobberPhysReg(DesignatedReg);
+
+ Spills.addAvailable(StackSlot, DesignatedReg);
+ MI.getOperand(i).setReg(DesignatedReg);
+ DEBUG(std::cerr << '\t' << *prior(MII));
++NumReused;
continue;
}
const TargetRegisterClass* RC =
MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
- RecheckRegister:
// Note that, if we reused a register for a previous operand, the
// register we want to reload into might not actually be
// available. If this occurs, use the register indicated by the
// reuser.
- if (!ReusedOperands.empty()) // This is most often empty.
- for (unsigned ro = 0, e = ReusedOperands.size(); ro != e; ++ro)
- if (ReusedOperands[ro].PhysRegReused == PhysReg) {
- // Yup, use the reload register that we didn't use before.
- PhysReg = ReusedOperands[ro].AssignedPhysReg;
- goto RecheckRegister;
- } else {
- ReusedOp &Op = ReusedOperands[ro];
- unsigned PRRU = Op.PhysRegReused;
- if (MRI->areAliases(PRRU, PhysReg)) {
- // Okay, we found out that an alias of a reused register
- // was used. This isn't good because it means we have
- // to undo a previous reuse.
- const TargetRegisterClass *AliasRC =
- MBB.getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
- MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg,
- Op.StackSlot, AliasRC);
- Spills.ClobberPhysReg(Op.AssignedPhysReg);
- Spills.ClobberPhysReg(Op.PhysRegReused);
-
- // Any stores to this stack slot are not dead anymore.
- MaybeDeadStores.erase(Op.StackSlot);
-
- MI.SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg);
-
- Spills.addAvailable(Op.StackSlot, Op.AssignedPhysReg);
- ++NumLoads;
- DEBUG(std::cerr << '\t' << *prior(MII));
-
- DEBUG(std::cerr << "Reuse undone!\n");
- ReusedOperands.erase(ReusedOperands.begin()+ro);
- --NumReused;
- goto ContinueReload;
- }
- }
- ContinueReload:
+ if (ReusedOperands.hasReuses())
+ PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
+ Spills, MaybeDeadStores);
+
PhysRegsUsed[PhysReg] = true;
MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
// This invalidates PhysReg.
MaybeDeadStores.erase(StackSlot);
Spills.addAvailable(StackSlot, PhysReg);
++NumLoads;
- MI.SetMachineOperandReg(i, PhysReg);
+ MI.getOperand(i).setReg(PhysReg);
DEBUG(std::cerr << '\t' << *prior(MII));
}
// Loop over all of the implicit defs, clearing them from our available
// sets.
- for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode());
- *ImpDef; ++ImpDef) {
- PhysRegsUsed[*ImpDef] = true;
- Spills.ClobberPhysReg(*ImpDef);
+ const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode());
+ if (ImpDef) {
+ for ( ; *ImpDef; ++ImpDef) {
+ PhysRegsUsed[*ImpDef] = true;
+ Spills.ClobberPhysReg(*ImpDef);
+ }
}
DEBUG(std::cerr << '\t' << MI);
if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
int FrameIdx;
if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
- // If this spill slot is available, turn it into a copy (or nothing)
- // instead of leaving it as a load!
- unsigned InReg;
- if (FrameIdx == SS && (InReg = Spills.getSpillSlotPhysReg(SS))) {
- DEBUG(std::cerr << "Promoted Load To Copy: " << MI);
- MachineFunction &MF = *MBB.getParent();
- if (DestReg != InReg) {
- MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
- MF.getSSARegMap()->getRegClass(VirtReg));
- // Revisit the copy so we make sure to notice the effects of the
- // operation on the destreg (either needing to RA it if it's
- // virtual or needing to clobber any values if it's physical).
- NextMII = &MI;
- --NextMII; // backtrack to the copy.
+ if (FrameIdx == SS) {
+ // If this spill slot is available, turn it into a copy (or nothing)
+ // instead of leaving it as a load!
+ if (unsigned InReg = Spills.getSpillSlotPhysReg(SS)) {
+ DEBUG(std::cerr << "Promoted Load To Copy: " << MI);
+ MachineFunction &MF = *MBB.getParent();
+ if (DestReg != InReg) {
+ MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
+ MF.getSSARegMap()->getRegClass(VirtReg));
+ // Revisit the copy so we make sure to notice the effects of the
+ // operation on the destreg (either needing to RA it if it's
+ // virtual or needing to clobber any values if it's physical).
+ NextMII = &MI;
+ --NextMII; // backtrack to the copy.
+ }
+ VRM.RemoveFromFoldedVirtMap(&MI);
+ MBB.erase(&MI);
+ goto ProcessNextInst;
}
- MBB.erase(&MI);
- goto ProcessNextInst;
}
}
}
MaybeDeadStores.erase(MDSI);
else {
// If we get here, the store is dead, nuke it now.
- assert(MR == VirtRegMap::isMod && "Can't be modref!");
+ assert(VirtRegMap::isMod && "Can't be modref!");
+ DEBUG(std::cerr << "Removed dead store:\t" << *MDSI->second);
MBB.erase(MDSI->second);
+ VRM.RemoveFromFoldedVirtMap(MDSI->second);
MaybeDeadStores.erase(MDSI);
++NumDSE;
}
unsigned VirtReg = MO.getReg();
if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
- // Check to see if this is a def-and-use vreg operand that we do need
- // to insert a store for.
- bool OpTakenCareOf = false;
- if (MO.isUse() && !DefAndUseVReg.empty()) {
- for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau)
- if (DefAndUseVReg[dau].first == i) {
- VirtReg = DefAndUseVReg[dau].second;
- OpTakenCareOf = true;
- break;
- }
+ // Check to see if this is a noop copy. If so, eliminate the
+ // instruction before considering the dest reg to be changed.
+ unsigned Src, Dst;
+ if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
+ ++NumDCE;
+ DEBUG(std::cerr << "Removing now-noop copy: " << MI);
+ MBB.erase(&MI);
+ VRM.RemoveFromFoldedVirtMap(&MI);
+ goto ProcessNextInst;
}
-
- if (!OpTakenCareOf) {
- // Check to see if this is a noop copy. If so, eliminate the
- // instruction before considering the dest reg to be changed.
- unsigned Src, Dst;
- if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
- ++NumDCE;
- DEBUG(std::cerr << "Removing now-noop copy: " << MI);
- MBB.erase(&MI);
- goto ProcessNextInst;
- }
- Spills.ClobberPhysReg(VirtReg);
- continue;
+
+ // If it's not a no-op copy, it clobbers the value in the destreg.
+ Spills.ClobberPhysReg(VirtReg);
+
+ // Check to see if this instruction is a load from a stack slot into
+ // a register. If so, this provides the stack slot value in the reg.
+ int FrameIdx;
+ if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
+ assert(DestReg == VirtReg && "Unknown load situation!");
+
+ // Otherwise, if it wasn't available, remember that it is now!
+ Spills.addAvailable(FrameIdx, DestReg);
+ goto ProcessNextInst;
}
+
+ continue;
}
// The only vregs left are stack slot definitions.
int StackSlot = VRM.getStackSlot(VirtReg);
const TargetRegisterClass *RC =
MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
- unsigned PhysReg;
- // If this is a def&use operand, and we used a different physreg for
- // it than the one assigned, make sure to execute the store from the
- // correct physical register.
- if (MO.getReg() == VirtReg)
- PhysReg = VRM.getPhys(VirtReg);
+ // If this def is part of a two-address operand, make sure to execute
+ // the store from the correct physical register.
+ unsigned PhysReg;
+ int TiedOp = TII->getTiedToSrcOperand(MI.getOpcode(), i);
+ if (TiedOp != -1)
+ PhysReg = MI.getOperand(TiedOp).getReg();
else
- PhysReg = MO.getReg();
+ PhysReg = VRM.getPhys(VirtReg);
PhysRegsUsed[PhysReg] = true;
MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
DEBUG(std::cerr << "Store:\t" << *next(MII));
- MI.SetMachineOperandReg(i, PhysReg);
+ MI.getOperand(i).setReg(PhysReg);
// Check to see if this is a noop copy. If so, eliminate the
// instruction before considering the dest reg to be changed.
++NumDCE;
DEBUG(std::cerr << "Removing now-noop copy: " << MI);
MBB.erase(&MI);
+ VRM.RemoveFromFoldedVirtMap(&MI);
goto ProcessNextInst;
}
}
// If there is a dead store to this stack slot, nuke it now.
MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
if (LastStore) {
- DEBUG(std::cerr << " Killed store:\t" << *LastStore);
+ DEBUG(std::cerr << "Removed dead store:\t" << *LastStore);
++NumDSE;
MBB.erase(LastStore);
+ VRM.RemoveFromFoldedVirtMap(LastStore);
}
LastStore = next(MII);