#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DepthFirstIterator.h"
TII = mf.getTarget().getInstrInfo();
TRI = mf.getTarget().getRegisterInfo();
MF = &mf;
-
+
ReMatId = MAX_STACK_SLOT+1;
LowSpillSlot = HighSpillSlot = NO_STACK_SLOT;
}
unsigned VirtRegMap::getRegAllocPref(unsigned virtReg) {
- std::pair<MachineRegisterInfo::RegAllocHintType, unsigned> Hint =
- MRI->getRegAllocationHint(virtReg);
- switch (Hint.first) {
- default: assert(0);
- case MachineRegisterInfo::RA_None:
- return 0;
- case MachineRegisterInfo::RA_Preference:
- if (TargetRegisterInfo::isPhysicalRegister(Hint.second))
- return Hint.second;
- if (hasPhys(Hint.second))
- return getPhys(Hint.second);
- case MachineRegisterInfo::RA_PairEven: {
- unsigned physReg = Hint.second;
- if (TargetRegisterInfo::isPhysicalRegister(physReg))
- return TRI->getRegisterPairEven(*MF, physReg);
- else if (hasPhys(physReg))
- return TRI->getRegisterPairEven(*MF, getPhys(physReg));
- return 0;
- }
- case MachineRegisterInfo::RA_PairOdd: {
- unsigned physReg = Hint.second;
- if (TargetRegisterInfo::isPhysicalRegister(physReg))
- return TRI->getRegisterPairOdd(*MF, physReg);
- else if (hasPhys(physReg))
- return TRI->getRegisterPairOdd(*MF, getPhys(physReg));
- return 0;
- }
- }
- // Shouldn't reach here.
- return 0;
+ std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(virtReg);
+ unsigned physReg = Hint.second;
+ if (physReg &&
+ TargetRegisterInfo::isVirtualRegister(physReg) && hasPhys(physReg))
+ physReg = getPhys(physReg);
+ if (Hint.first == 0)
+ return (physReg && TargetRegisterInfo::isPhysicalRegister(physReg))
+ ? physReg : 0;
+ return TRI->ResolveRegAllocHint(Hint.first, physReg, *MF);
}
int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
"attempt to assign stack slot to already spilled register");
const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg);
- int SS = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
- RC->getAlignment());
+ int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(),
+ RC->getAlignment());
if (LowSpillSlot == NO_STACK_SLOT)
LowSpillSlot = SS;
if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot)
EmergencySpillSlots.find(RC);
if (I != EmergencySpillSlots.end())
return I->second;
- int SS = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
- RC->getAlignment());
+ int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(),
+ RC->getAlignment());
if (LowSpillSlot == NO_STACK_SLOT)
LowSpillSlot = SS;
if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot)
return AnyUnused;
}
-void VirtRegMap::print(std::ostream &OS, const Module* M) const {
+void VirtRegMap::print(raw_ostream &OS, const Module* M) const {
const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo();
OS << "********** REGISTER MAP **********\n";
}
void VirtRegMap::dump() const {
- print(cerr);
+ print(errs());
}