class LiveIntervals;
class MachineInstr;
class MachineFunction;
+ class MachineRegisterInfo;
class TargetInstrInfo;
+ class TargetRegisterInfo;
class VirtRegMap : public MachineFunctionPass {
public:
std::pair<unsigned, ModRef> > MI2VirtMapTy;
private:
+ MachineRegisterInfo *MRI;
const TargetInstrInfo *TII;
-
+ const TargetRegisterInfo *TRI;
MachineFunction *MF;
+
+ DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs;
+
/// Virt2PhysMap - This is a virtual to physical register
/// mapping. Each virtual register is required to have an entry in
/// it; even spilled virtual registers (the register mapped to a
grow();
}
+ /// @brief returns the register allocation preference.
+ unsigned getRegAllocPref(unsigned virtReg);
+
/// @brief records virtReg is a split live interval from SReg.
void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
Virt2SplitMap[virtReg] = SReg;
/// FindUnusedRegisters - Gather a list of allocatable registers that
/// have not been allocated to any virtual register.
- bool FindUnusedRegisters(const TargetRegisterInfo *TRI,
- LiveIntervals* LIs);
+ bool FindUnusedRegisters(LiveIntervals* LIs);
/// HasUnusedRegisters - Return true if there are any allocatable registers
/// that have not been allocated to any virtual register.
unsigned getFirstUnusedRegister(const TargetRegisterClass *RC) {
int Reg = UnusedRegs.find_first();
while (Reg != -1) {
- if (RC->contains(Reg))
+ if (allocatableRCRegs[RC][Reg])
return (unsigned)Reg;
Reg = UnusedRegs.find_next(Reg);
}