[X86][Haswell][SchedModel] Add architecture specific scheduling models.

[oota-llvm.git] / lib / DebugInfo / DWARFContext.cpp

diff --git a/lib/DebugInfo/DWARFContext.cpp b/lib/DebugInfo/DWARFContext.cpp
index 3961905f65822a05d35447d13880d1732a411a5b..fc8d93dce3d0c8a5fde50f532e1f85e3be53da8c 100644 (file)
--- a/lib/DebugInfo/DWARFContext.cpp
+++ b/lib/DebugInfo/DWARFContext.cpp
@@ -621,10 +621,10 @@ static bool consumeCompressedDebugSectionHeader(StringRef &data,
   return true;
 }
 
-DWARFContextInMemory::DWARFContextInMemory(object::ObjectFile *Obj)
-    : IsLittleEndian(Obj->isLittleEndian()),
-      AddressSize(Obj->getBytesInAddress()) {
-  for (const SectionRef &Section : Obj->sections()) {
+DWARFContextInMemory::DWARFContextInMemory(object::ObjectFile &Obj)
+    : IsLittleEndian(Obj.isLittleEndian()),
+      AddressSize(Obj.getBytesInAddress()) {
+  for (const SectionRef &Section : Obj.sections()) {
     StringRef name;
     Section.getName(name);
     StringRef data;
@@ -687,7 +687,7 @@ DWARFContextInMemory::DWARFContextInMemory(object::ObjectFile *Obj)
     }
 
     section_iterator RelocatedSection = Section.getRelocatedSection();
-    if (RelocatedSection == Obj->section_end())
+    if (RelocatedSection == Obj.section_end())
       continue;
 
     StringRef RelSecName;
@@ -724,12 +724,12 @@ DWARFContextInMemory::DWARFContextInMemory(object::ObjectFile *Obj)
         Reloc.getType(Type);
         uint64_t SymAddr = 0;
         // ELF relocations may need the symbol address
-        if (Obj->isELF()) {
+        if (Obj.isELF()) {
           object::symbol_iterator Sym = Reloc.getSymbol();
           Sym->getAddress(SymAddr);
         }
 
-        object::RelocVisitor V(Obj->getFileFormatName());
+        object::RelocVisitor V(Obj.getFileFormatName());
         // The section address is always 0 for debug sections.
         object::RelocToApply R(V.visit(Type, Reloc, 0, SymAddr));
         if (V.error()) {