[mips][microMIPS] MicroMIPS Compact Branch Instructions BEQZC and BNEZC

[oota-llvm.git] / lib / Target / AArch64 / AArch64FastISel.cpp

diff --git a/lib/Target/AArch64/AArch64FastISel.cpp b/lib/Target/AArch64/AArch64FastISel.cpp
index a59ee85423bf9bce8ef6b6c5528ea750e34836c7..adcb64d191c984a114f74e26853773f8be8b36d5 100644 (file)
--- a/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/lib/Target/AArch64/AArch64FastISel.cpp
@@ -487,7 +487,7 @@ bool AArch64FastISel::ComputeAddress(const Value *Obj, Address &Addr, Type *Ty)
           NumBytes = 0;
       }
 
-      if (NumBytes != (1 << Val))
+      if (NumBytes != (1U << Val))
         break;
 
       Addr.setShift(Val);
@@ -1687,10 +1687,15 @@ bool AArch64FastISel::FinishCall(CallLoweringInfo &CLI, MVT RetVT,
 
 bool AArch64FastISel::FastLowerCall(CallLoweringInfo &CLI) {
   CallingConv::ID CC  = CLI.CallConv;
+  bool IsTailCall     = CLI.IsTailCall;
   bool IsVarArg       = CLI.IsVarArg;
   const Value *Callee = CLI.Callee;
   const char *SymName = CLI.SymName;
 
+  // Allow SelectionDAG isel to handle tail calls.
+  if (IsTailCall)
+    return false;
+
   CodeModel::Model CM = TM.getCodeModel();
   // Only support the small and large code model.
   if (CM != CodeModel::Small && CM != CodeModel::Large)