.addImm(16);
return;
}
+ } else if (AArch64::FPR8RegClass.contains(DestReg, SrcReg)) {
+ // The copy of two FPR8 registers is implemented by the copy of two FPR32
+ const TargetRegisterInfo *TRI = &getRegisterInfo();
+ unsigned Dst = TRI->getMatchingSuperReg(DestReg, AArch64::sub_8,
+ &AArch64::FPR32RegClass);
+ unsigned Src = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_8,
+ &AArch64::FPR32RegClass);
+ BuildMI(MBB, I, DL, get(AArch64::FMOVss), Dst)
+ .addReg(Src);
+ return;
} else if (AArch64::FPR16RegClass.contains(DestReg, SrcReg)) {
// The copy of two FPR16 registers is implemented by the copy of two FPR32
const TargetRegisterInfo *TRI = &getRegisterInfo();
- unsigned Dst = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_16,
+ unsigned Dst = TRI->getMatchingSuperReg(DestReg, AArch64::sub_16,
&AArch64::FPR32RegClass);
- unsigned Src = TRI->getMatchingSuperReg(DestReg, AArch64::sub_16,
+ unsigned Src = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_16,
&AArch64::FPR32RegClass);
BuildMI(MBB, I, DL, get(AArch64::FMOVss), Dst)
.addReg(Src);
default:
llvm_unreachable("Unknown size for regclass");
}
+ } else if (AArch64::FPR8RegClass.hasSubClassEq(RC)) {
+ StoreOp = AArch64::LSFP8_STR;
+ } else if (AArch64::FPR16RegClass.hasSubClassEq(RC)) {
+ StoreOp = AArch64::LSFP16_STR;
} else if (RC->hasType(MVT::f32) || RC->hasType(MVT::f64) ||
RC->hasType(MVT::f128)) {
switch (RC->getSize()) {
default:
llvm_unreachable("Unknown size for regclass");
}
+ } else if (AArch64::FPR8RegClass.hasSubClassEq(RC)) {
+ LoadOp = AArch64::LSFP8_LDR;
+ } else if (AArch64::FPR16RegClass.hasSubClassEq(RC)) {
+ LoadOp = AArch64::LSFP16_LDR;
} else if (RC->hasType(MVT::f32) || RC->hasType(MVT::f64) ||
RC->hasType(MVT::f128)) {
switch (RC->getSize()) {
int &AccessScale, int &MinOffset,
int &MaxOffset) const {
switch (MI.getOpcode()) {
- default: llvm_unreachable("Unkown load/store kind");
+ default:
+ llvm_unreachable("Unknown load/store kind");
case TargetOpcode::DBG_VALUE:
AccessScale = 1;
MinOffset = INT_MIN;
if (MI.getOpcode() == AArch64::INLINEASM)
return getInlineAsmLength(MI.getOperand(0).getSymbolName(), MAI);
- if (MI.isLabel())
- return 0;
-
switch (MI.getOpcode()) {
case TargetOpcode::BUNDLE:
return getInstBundleLength(MI);
case TargetOpcode::IMPLICIT_DEF:
case TargetOpcode::KILL:
- case TargetOpcode::PROLOG_LABEL:
+ case TargetOpcode::CFI_INSTRUCTION:
case TargetOpcode::EH_LABEL:
+ case TargetOpcode::GC_LABEL:
case TargetOpcode::DBG_VALUE:
- return 0;
case AArch64::TLSDESCCALL:
return 0;
default: