R600/SI: Expand ashr of v2i32/v4i32 for SI

[oota-llvm.git] / lib / Target / AArch64 / AArch64RegisterInfo.td

diff --git a/lib/Target/AArch64/AArch64RegisterInfo.td b/lib/Target/AArch64/AArch64RegisterInfo.td
index bd79546371c5c6296ce376bce0916d37c9433d7e..cc2bb6135cccc6f7f8c5fd52df3b925b3cf40ec2 100644 (file)
--- a/lib/Target/AArch64/AArch64RegisterInfo.td
+++ b/lib/Target/AArch64/AArch64RegisterInfo.td
@@ -12,15 +12,15 @@
 //===----------------------------------------------------------------------===//
 
 let Namespace = "AArch64" in {
-def sub_128 : SubRegIndex;
-def sub_64 : SubRegIndex;
-def sub_32 : SubRegIndex;
-def sub_16 : SubRegIndex;
-def sub_8  : SubRegIndex;
+def sub_128 : SubRegIndex<128>;
+def sub_64 : SubRegIndex<64>;
+def sub_32 : SubRegIndex<32>;
+def sub_16 : SubRegIndex<16>;
+def sub_8  : SubRegIndex<8>;
 
 // The VPR registers are handled as sub-registers of FPR equivalents, but
 // they're really the same thing. We give this concept a special index.
-def sub_alias : SubRegIndex;
+def sub_alias : SubRegIndex<128>;
 }
 
 // Registers are identified with 5-bit ID numbers.