#ifndef TARGET_ARM_H
#define TARGET_ARM_H
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetMachine.h"
#include <cassert>
namespace llvm {
-class ARMTargetMachine;
+class ARMBaseTargetMachine;
class FunctionPass;
class MachineCodeEmitter;
class JITCodeEmitter;
-class raw_ostream;
+class ObjectCodeEmitter;
+class formatted_raw_ostream;
// Enums corresponding to ARM condition codes
namespace ARMCC {
- // The CondCodes constants map directly to the 4-bit encoding of the
- // condition field for predicated instructions.
+ // The CondCodes constants map directly to the 4-bit encoding of the
+ // condition field for predicated instructions.
enum CondCodes {
EQ,
NE,
LE,
AL
};
-
+
inline static CondCodes getOppositeCondition(CondCodes CC){
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: llvm_unreachable("Unknown condition code");
case EQ: return NE;
case NE: return EQ;
case HS: return LO;
inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
switch (CC) {
- default: assert(0 && "Unknown condition code");
+ default: llvm_unreachable("Unknown condition code");
case ARMCC::EQ: return "eq";
case ARMCC::NE: return "ne";
case ARMCC::HS: return "hs";
}
}
-FunctionPass *createARMISelDag(ARMTargetMachine &TM);
-FunctionPass *createARMCodePrinterPass(raw_ostream &O,
- ARMTargetMachine &TM,
- CodeGenOpt::Level OptLevel,
- bool Verbose);
-FunctionPass *createARMCodeEmitterPass(ARMTargetMachine &TM,
+FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM);
+FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM,
+ MachineCodeEmitter &MCE);
+
+FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM,
MachineCodeEmitter &MCE);
+FunctionPass *createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
+ JITCodeEmitter &JCE);
+FunctionPass *createARMObjectCodeEmitterPass(ARMBaseTargetMachine &TM,
+ ObjectCodeEmitter &OCE);
-FunctionPass *createARMCodeEmitterPass(
- ARMTargetMachine &TM, MachineCodeEmitter &MCE);
-/*
-template< class machineCodeEmitter>
-FunctionPass *createARMCodeEmitterPass(
- ARMTargetMachine &TM, machineCodeEmitter &MCE);
-*/
-FunctionPass *createARMJITCodeEmitterPass(
- ARMTargetMachine &TM, JITCodeEmitter &JCE);
-
-FunctionPass *createARMLoadStoreOptimizationPass();
+FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
FunctionPass *createARMConstantIslandPass();
+FunctionPass *createThumb2ITBlockPass();
+
+extern Target TheARMTarget, TheThumbTarget;
+
} // end namespace llvm;
// Defines symbolic names for ARM registers. This defines a mapping from