-//===- ARMBaseRegisterInfo.h - ARM Register Information Impl --------*- C++ -*-===//
+//===- ARMBaseRegisterInfo.h - ARM Register Information Impl ----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
BitVector getReservedRegs(const MachineFunction &MF) const;
- const TargetRegisterClass *getPointerRegClass() const;
+ const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const;
std::pair<TargetRegisterClass::iterator,TargetRegisterClass::iterator>
getAllocationOrder(const TargetRegisterClass *RC,
bool hasFP(const MachineFunction &MF) const;
+ bool cannotEliminateFrame(const MachineFunction &MF) const;
+
void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
RegScavenger *RS = NULL) const;
virtual bool requiresRegisterScavenging(const MachineFunction &MF) const;
+ virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
+
virtual bool hasReservedCallFrame(MachineFunction &MF) const;
virtual void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
- // rewrite MI to access 'Offset' bytes from the FP. Return the offset that
- // could not be handled directly in MI.
- virtual int
- rewriteFrameIndex(MachineInstr &MI, unsigned FrameRegIdx,
- unsigned MOVOpc, unsigned ADDriOpc, unsigned SUBriOpc,
- unsigned FrameReg, int Offset) const;
-
- virtual void
- eliminateFrameIndex(MachineBasicBlock::iterator II,
- int SPAdj, RegScavenger *RS = NULL) const {
- eliminateFrameIndexImpl(II, ARM::MOVr, ARM::ADDri, ARM::SUBri, SPAdj, RS);
- }
+ virtual unsigned eliminateFrameIndex(MachineBasicBlock::iterator II,
+ int SPAdj, int *Value = NULL,
+ RegScavenger *RS = NULL) const;
virtual void emitPrologue(MachineFunction &MF) const;
virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
-protected:
- void
- eliminateFrameIndexImpl(MachineBasicBlock::iterator II,
- unsigned MOVOpc, unsigned ADDriOpc, unsigned SUBriOpc,
- int SPAdj, RegScavenger *RS = NULL) const;
-
private:
+ unsigned estimateRSStackSizeLimit(MachineFunction &MF) const;
+
unsigned getRegisterPairEven(unsigned Reg, const MachineFunction &MF) const;
unsigned getRegisterPairOdd(unsigned Reg, const MachineFunction &MF) const;