llvm-ar: Clean up memory management with OwningPtr.

[oota-llvm.git] / lib / Target / ARM / ARMBuildAttrs.h

diff --git a/lib/Target/ARM/ARMBuildAttrs.h b/lib/Target/ARM/ARMBuildAttrs.h
index 11bd6a4a8dbc6c94c3930cb9d1067373416b2d46..f614dcaa79e8c52834f5d59e7bd47401b3aeed21 100644 (file)
--- a/lib/Target/ARM/ARMBuildAttrs.h
+++ b/lib/Target/ARM/ARMBuildAttrs.h
@@ -89,7 +89,8 @@ namespace ARMBuildAttrs {
     v7       = 10,  // e.g. Cortex A8, Cortex M3
     v6_M     = 11,  // e.g. Cortex M1
     v6S_M    = 12,  // v6_M with the System extensions
-    v7E_M    = 13   // v7_M with DSP extensions
+    v7E_M    = 13,  // v7_M with DSP extensions
+    v8       = 14   // v8, AArch32
   };
 
   enum CPUArchProfile { // (=7), uleb128 
@@ -105,6 +106,7 @@ namespace ARMBuildAttrs {
     //ARMISAUse (=8), uleb128  and THUMBISAUse (=9), uleb128
     Not_Allowed = 0,
     Allowed = 1,
+    AllowedNeonV8 = 3,
 
     // FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
     AllowFPv2  = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA)
@@ -112,6 +114,8 @@ namespace ARMBuildAttrs {
     AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31 
     AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA) 
     AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31
+    AllowV8FPA = 7, // Use of the ARM v8-A FP ISA was permitted
+    AllowV8FPB = 8, // Use of the ARM v8-A FP ISA was permitted, but only D0-D15, S0-S31
 
     // Tag_WMMX_arch, (=11), uleb128
     AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)