#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Target/TargetTransformImpl.h"
#include <vector>
namespace llvm {
virtual EVT getOptimalMemOpType(uint64_t Size,
unsigned DstAlign, unsigned SrcAlign,
- bool IsZeroVal,
+ bool IsMemset, bool ZeroMemset,
bool MemcpyStrSrc,
MachineFunction &MF) const;
/// materialize the FP immediate as a load from a constant pool.
virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const;
- virtual bool isIntImmLegal(const APInt &Imm, EVT VT) const;
-
virtual bool getTgtMemIntrinsic(IntrinsicInfo &Info,
const CallInst &I,
unsigned Intrinsic) const;
FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
const TargetLibraryInfo *libInfo);
}
+
+ class ARMScalarTargetTransformImpl : public ScalarTargetTransformImpl {
+ const ARMSubtarget *Subtarget;
+ public:
+ explicit ARMScalarTargetTransformImpl(const TargetLowering *TL) :
+ ScalarTargetTransformImpl(TL),
+ Subtarget(&TL->getTargetMachine().getSubtarget<ARMSubtarget>()) {};
+
+ virtual unsigned getIntImmCost(const APInt &Imm, Type *Ty) const;
+ };
}
#endif // ARMISELLOWERING_H